Deep Trench Isolation for Crosstalk Suppression in Active Pixel Sensors with 1.7 μm Pixel Pitch
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概要
- 論文の詳細を見る
A deep trench isolation (DTI) process with a 4 μm deep trench has been developed and successfully applied to 5-megapixel complementary metal oxide silicon (CMOS) image sensors with a 1.7 μm pixel pitch. It was found that from the results of simulations and experiments, DTI is very effective for reducing electrical crosstalk without degrading other pixel characteristics, such as full well capacity, sensitivity, and white spot density. Therefore, DTI could be a solution for obtaining a high performance for CMOS image sensors with a small pixel size of sub-2.0 μm.
- 2007-04-30
著者
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Paik Kee
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Jung Jongwan
Department Of Nano Science And Technology Sejong University
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Lee Duck
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Kim Kinam
Semiconductor R & D Center Memory Division Semiconductor Business Samsung Electronics Co. Ltd.
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Park Byung
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Moon Chang-rok
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Yoo Jong
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Kim Dae
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Hwang Sung
Semiconductor Research Center Memory Division Semiconductor Business Samsung Electronics Co.
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Paik Kee
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Lee Yong
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Yoo Jong
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Lee Yong
Semiconductor Physics Research Center and School of Semiconductor and Chemical Engineering, Chonbuk National University, Chonju 561-756, Republic of Korea
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Park Byung
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Hwang Sung
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Moon Chang-Rok
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Kim Kinam
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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Kim Dae
Semiconductor Research Center, Memory Division, Samsung Electronics Co., Ltd., San #24 Nongseo-Ri, Giheung-Eup, Yongin-City, Gyeonggi-Do 449-711, Korea
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