Analysis and Design of Direct Reference Feed-Forward Compensation for Fast-Settling All-Digital Phase-Locked Loop(Analog and Communications,<Special Section>Low-Power, High-Speed LSIs and Related Technologies)

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概要

• 論文の詳細を見る

• A method for shortening of the settling time in all digital phase-locked loops is proposed. The method utilizes self monitoring to obtain the parameters necessary for feed-forward compensation. Analysis shows that by employing this technique both fast settling and good stability can be achieved simultaneously. Matlab and Verilog-AMS simulation shows that typical settling speed can be reduced to less than one tenth compared to a system without the feed-forward compensation, by merely employing the feed-forward compensation system. Further more a design example shows that this settling time can be decreased further to less than one fifteenth through design considerations when compared to a speed optimized phase-locked loop design system without direct reference feed-forward compensation.

• 社団法人電子情報通信学会の論文
• 2007-04-01

著者

• MATSUZAWA Akira

  Department of Physical Electronics, Tokyo Institute of Technology

• CHAIVIPAS Win

  Department of Physical Electronics, Graduate School of Science and Engineering, Tokyo Institute of T

• Chaivipas Win

  Department Of Physical Electronics Graduate School Of Science And Engineering Tokyo Institute Of Tec

• Matsuzawa Akira

  Department Of Physical Electronics Tokyo Institute Of Technology

• Chaivipas Win

  Department Physical Electronics Tokyo Institute Of Technology

• Matsuzawa Akira

  Department Physical Electronics Tokyo Institute Of Technology

• Matsuzawa Akira

  Department Of Physical Electronics Graduate School Of Science And Engineering Tokyo Institute Of Technology

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