Development of New Etching Algorithm for Ultra Large Scale Integrated Circuit and Application of ICP (Inductive Coupled Plasma) Etcher
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概要
- 論文の詳細を見る
In this paper, we proposed new etching algorithm for ultra-large scale integrated circuit device and simulated etching process using the proposed algorithm in the case of ICP(inductive coupled plasma) source. Until now, algorithms for etching process simulation have been Cell remove algorithm, String algorithm and Ray algorithm. These algorithms have several drawbacks due to analytic function, these algorithms are not appropriate for sub 0.1 μm device technologies which should deal with each ion. In order to apply ULSI process simulation, algorithm considering above mentioned interactions at the same time is needed. Proposed algorithm calculates interactions both in plasma source region and in target material region, and uses BCA (binary collision approximation) method when ion impacts on target material surface. Proposed algorithm considers the interaction between source ion and another ion in sheath region (from Quartz region to substrate region). After collision between target and ion, reflected ion collides next projectile ion or sputtered atoms. In ICP etching, because the main mechanism is sputtering, both SiO_2 and Si can be etched. Therefore, to obtain etching profiles, mask thickness and composition must be considered. Since we consider both SiO_2 and Si etching, it is possible to predict the thickness of SiO_2 for etching of ULSI.
- 社団法人電子情報通信学会の論文
- 1999-07-23
著者
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Kwon Oh-kyong
Department Of Electrical Engineering Hanyang University
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Lee Young-ghik
Semiconductor Process And Device Laboratory Dept. Of Electronic Engineering Chung-ang University
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Kwon O‐k
Division Of Electrical And Computer Engineering Hanyang University
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Kwon Oh-keun
Semiconductor Process And Device Laboratory Dept. Of Electronic Engineering Chung-ang University
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Kang Jeong-won
Semiconductor Process And Device Laboratory Dept. Of Electronic Engineering Chung-ang University
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Hwang H‐j
Chung‐ang Univ. Seoul Kor
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Lee Young-chul
Pg.1 R&d Division Lg Semicon Co. Ltd.
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Park Su-hyun
Semiconductor Process And Device Lab Dept. Of Electronic Engineering Chung-ang Univ.
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Lee Young-Chig
Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ.
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Son Myung-Sik
Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ.
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Kang Joong-Won
Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ.
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Byun Ki-Ryang
Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ.
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Hwang Ho-Jung
Semiconductor Process and Device Lab,, Dept. of Electronic Engineering, Chung-Ang Univ.
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Byun Ki-ryang
Semiconductor Process And Device Laboratory Dept. Of Electronic Engineering Chung-ang University
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Son Myung-sik
Millimeter-wave Innovaiton Technology Research Center Dongguk University
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