表面筋電位信号処理LSIのための低電圧・低消費電力・低ノイズ増幅器に関する研究

概要

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In this thesis, a low-voltage, low-power and low-noise amplifier for surface-myoelectricity signal processingLSIs. In the proposed amplifier, the number of series-connected MOSFETs suppresses less than four in order tomaintain low-voltage operation, and the weakinversion region of MOSFETs is utilized for low power consumption.Furthermore, the amplifier is designed based on long-channel P-channel MOSFETs in order to reducethe 1/f noise. Using these techniques, an operational amplifier (op-amp) is designed and evaluated throughHSPICE simulations with Motorola 1.2/μm CMOS device parameters. From the simulation results, the op-ampcould be operated from 2.4V to 3.0V of the supply voltage. The power consumption and the input referrednoise were 14μW and 14μV, respectively. As the results, the low-voltage, low-power and low-noise op-ampcould be realized. Next, a instrumentation amplifier is designed using the op-amps, moreover, a amplifier forsurface-myoelectricity signal processing LSIs is also designed using the instrumentation amplifiers. Since theproposed amplifier is adopted the double-differential architecture, the following advantages are achieved: theelimination of the common-mode noise, the reduction of the leakage myoelectricity from adjacent lines and theestimation for the propagation velocity of the myoelectricity. Finally, the mask layouts of the proposed circuitswere designed, and the amplifier occupied 1.8mm x 1.5mm.
宮崎大学の論文