Optimizing Controlling-Value-Based Power Gating with Gate Count and Switching Activity

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概要

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• In this paper, a new heuristic algorithm is proposed to optimize the power domain clustering in controlling-value-based (CV-based) power gating technology. In this algorithm, both the switching activity of sleep signals (p) and the overall numbers of sleep gates (gate count, N) are considered, and the sum of the product of p and N is optimized. The algorithm effectively exerts the total power reduction obtained from the CV-based power gating. Even when the maximum depth is kept to be the same, the proposed algorithm can still achieve power reduction approximately 10% more than that of the prior algorithms. Furthermore, detailed comparison between the proposed heuristic algorithm and other possible heuristic algorithms are also presented. HSPICE simulation results show that over 26% of total power reduction can be obtained by using the new heuristic algorithm. In addition, the effect of dynamic power reduction through the CV-based power gating method and the delay overhead caused by the switching of sleep transistors are also shown in this paper.

• （社）電子情報通信学会の論文
• 2009-12-01

著者

• Chen Lei

  Graduate School Of Information Production And Systems Waseda University

• KIMURA Shinji

  Graduate School of Information Science, Nara Institute of Science and Technology

• Kimura Shinji

  Graduate School Of Information Production And Systems Waseda University

• Chen Lei

  Graduate Institute Of Ferrous Technology Pohang University Of Science And Technology

• Kimura Shinji

  Graduate School Of Engineering Nagoya University

• Chen Lei

  Graduate School of Information, Production and Systems, Waseda University

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