Coverage Estimation Using Transition Perturbation for Symbolic Model Checking in Hardware Verification(Simulation and Verification,<Special Section>VLSI Design and CAD Algorithms)

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概要

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• Lack of complete formal specification is one of the major obstacles to the deployment of model checking. Coverage estimation addresses this issue by revealing the unverified part of the design according to the specified properties. In this paper we propose a new transition-based coverage metric to evaluate the completeness of properties for symbolic model checking. Our coverage metric pinpoints the transitions through which the values of signals are checked. An efficient symbolic algorithm is presented for computing the transition coverage for a subset of ACTL. Our coverage estimator has been applied to the model checking of a cache coherence protocol. We uncovered several coverage holes including one that eventually led to the discovery of a design bug.

• 2006-12-01

著者

• Kimura Shinji

  Graduate School Of Information Production And Systems Waseda University

• Kimura Shinji

  Graduate School Of Ips Waseda University

• XU Xingwen

  Graduate School of IPS, Waseda University

• HORIKAWA Kazunari

  System LSI Design Division, Toshiba Semiconductor

• TSUCHIYA Takehiko

  System LSI Design Division, Toshiba Semiconductor

• Tsuchiya Takehiko

  System Lsi Design Division Toshiba Semiconductor

• Xu Xingwen

  Graduate School Of Ips Waseda University

• Horikawa Kazunari

  System Lsi Design Division Toshiba Semiconductor

• Kimura Shinji

  Graduate School Of Engineering Nagoya University

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