Suppression of Edge Effects Based on Analytic Model for Leakage Current Reduction of Sub-40nm DRAM Device
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概要
- 論文の詳細を見る
- 2010-05-01
著者
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PARK Young
Semiconductor Materials Laboratory, Nano-device Research Center, Korea Institute of Science and Tech
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Lee Sang
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Cho Jun
Sungkyunkwan University
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CHOI Soo
Semiconductor R&D Center, Samsung Electronics Co. Ltd.
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PARK Chul
Semiconductor R&D Center, Samsung Electronics Co. Ltd.
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YOO Moon
Semiconductor R&D Center, Samsung Electronics Co. Ltd.
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KIM Gyu
Korea University
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Cho Jun
Sungkyunkwan Univ. Suwon Kor
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Choi Soo
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Yoo Moon
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park Chul
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park Young
Semiconductor Materials Laboratory Korea Institute Of Science And Technology:department Of Physics K
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Park Young
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park Chul
Semiconductor Device Lab Samsung Advanced Institute Of Technology
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Park Young
Semicondactor Materials Laboratory Korea Insrirute Of Science And Technology
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