Construction of Soft-Error-Tolerant FF with Wide Error Pulse Detecting Capability
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概要
- 論文の詳細を見る
In the recent high-density and low-power VLSIs, the occurrence of soft errors has become a significant problem. Recently, soft errors frequently occur on not only memory system but also logic circuits. Based on this standpoint, some constructions of soft-error-tolerant FFs were proposed. A conventional FF consists of some master and slave latches and C-elements. In the FF, soft error pulses occurring on combinational parts of logic circuits are corrected as long as the width of the pulses is narrow, that is within a specified width. However, error pulses with wide width are neither detected nor corrected in the FF. This paper presents a construction of soft-error-tolerant FFs by modifying the conventional soft-error-tolerant FF. The proposed FFs have the capability to detect error pulses having wide width as well as the capability to correct those having narrow width. The proposed FFs are also capable of detecting hard errors. The evaluation shows the soft-error-tolerant capability, AC characteristics, area overhead and power consumption of the FFs.
- （社）電子情報通信学会の論文
- 2009-08-01
著者
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Ito Hideo
Graduate School Of Advanced Integration Sci. Chiba Univ.
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Namba Kazuteru
Graduate School Of Advanced Integration Sci. Chiba Univ.
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Ruan Shuangyu
Graduate School Of Advanced Integration Science Chiba University
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