Two-Level Unequal Error Protection Codes with Burst and Bit Error Correcting Capabilities
スポンサーリンク
概要
- 論文の詳細を見る
This letter presents a code which corrects single bit errors in any location of the word as well as l-bit burst errors occurred in an important part of the word, The proposed code is designed by product of the parity check matrix of the l-bit burst error correcting codes and the matrix which converts input unequal errors into equal errors. This letter also demonstrates the evaluation of the code and presents the extended codes with two-level burst error correcting capabilities by interleaving.
- 社団法人電子情報通信学会の論文
- 2002-06-01
著者
-
Fujiwara Eiji
Graduate School Of Information Science And Engineering Tokyo Institute Of Technology
-
Namba Kazuteru
Graduate School Of Advanced Integration Science Chiba University
-
Namba Kazuteru
Graduate School Of Information Science And Engineering Tokyo Institute Of Technology
-
Namba Kazuteru
Graduate School Of Advanced Integration Sci. Chiba Univ.
関連論文
- BILBO FF with soft error correcting capability (コンピュータシステム)
- BILBO FF with soft error correcting capability (ディペンダブルコンピューティング)
- MacWilliams Identity for M-Spotty Weight Enumerator
- Test Compression for Robust Testable Path Delay Fault Testing Using Interleaving and Statistical Coding
- A Class of Error Locating Codes : SEC - S_EL Codes
- Defect-Tolerant WSI File Memory System Using Address Permutation for Spare Allocation
- A Class of Codes for Correcting Single Spotty Byte Errors
- Adjacent Double Bit Error Correcting Codes with Single Byte Error Detecting Capability for Memory Systems
- Single Byte Error Correcting Codes with Double Bit within a Block Error Correcting Capability for Memory Systems
- Design for Delay Fault Testability of Dual Circuits Using Master and Slave Scan Paths
- Design for Delay Fault Testability of 2-Rail Logic Circuits
- A Class of Unidirectional Byte Error Locating Codes with Single Symmetric Bit Error Correction Capability (Special Section of Letters Selected from the 1994 IEICE Spring Conference)
- A General Class of M-Spotty Byte Error Control Codes(Coding Theory)
- Single-Event-Upset Tolerant RS Flip-Flop with Small Area
- Complex M-Spotty Byte Error Control Codes(Coding Theory)
- Parallel Decoding for Burst Error Control Codes
- Two-Level Unequal Error Protection Codes with Burst and Bit Error Correcting Capabilities
- Unequal Error Protection in Ziv-Lempel Coding(Dependable Communication)(Dependable Computing)
- Construction of BILBO FF with Soft-Error-Tolerant Capability
- Construction of Soft-Error-Tolerant FF with Wide Error Pulse Detecting Capability
- Analysis of Path Delay Fault Testability for Two-Rail Logic Circuits
- A Dynamically Configurable NoC Test Access Mechanism
- A Dynamically Configurable NoC Test Access Mechanism (VLSI設計技術)
- A Dynamically Configurable NoC Test Access Mechanism
- A Dynamically Configurable NoC Test Access Mechanism
- Unequal Error Control Codes with Two-Level Burst and Bit Error Correcting Capabilities
- Design for Delay Measurement Aimed at Detecting Small Delay Defects on Global Routing Resources in FPGA
- Improving Test Coverage by Measuring Path Delay Time Including Transmission Time of FF