Improvement of Thermal Stability of MRAM Device with SiN Protective Film Deposited by HDP CVD
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概要
- 論文の詳細を見る
- 2007-09-19
著者
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Hada H
System Devices Research Laboratories Nec Corporation
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Hada Hiromitsu
Nec Corporation Device Platforms Research Laboratories
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Hada Hiromitsu
Silicon Systems Research Laboratories Nec Corporation
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Kasai Naoki
Device Platforms Laboratories Nec Corporation
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SUEMITSU Katsumi
NEC Corporation, Device Platforms Research Laboratories
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KAWANO Yuichi
Mitsubishi Heavy Industries, LTD.
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UTSUMI Hiroaki
NEC Corporation, Device Platforms Research Laboratories
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HONJO Hiroaki
NEC Corporation, Device Platforms Research Laboratories
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NEBASHI Ryusuke
NEC Corporation, Device Platforms Research Laboratories
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SAITO Shinsaku
NEC Corporation, Device Platforms Research Laboratories
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OHSHIMA Norikazu
NEC Corporation, Device Platforms Research Laboratories
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SUGIBAYASHI Tadahiko
NEC Corporation, Device Platforms Research Laboratories
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NOHISA Tatsuhiko
Mitsubishi Heavy Industries, LTD.
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SHIMAZU Tadashi
Mitsubishi Heavy Industries, LTD.
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INOUE Masahiko
Mitsubishi Heavy Industries, LTD.
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KASAI Naoki
NEC Corporation, Device Platforms Research Laboratories
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Kawano Yuichi
Mitsubishi Heavy Industries Ltd.
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Utsumi Hiroaki
Nec Corporation Device Platforms Research Laboratories
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Nohisa Tatsuhiko
Mitsubishi Heavy Industries Ltd.
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Suemitsu Katsumi
Nec Corporation Device Platforms Research Laboratories
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Ohshima Norikazu
Nec Corporation
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Ohshima Norikazu
Nec Corporation Device Platforms Research Laboratories
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Sugibayashi T
Device Platforms Laboratories Nec Corporation
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Honjo Hiroaki
Nec Corporation Device Platforms Research Laboratories
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Nebashi Ryusuke
Device Platforms Laboratories Nec Corporation
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Saito Shinsaku
Nec Corporation Device Platforms Research Laboratories
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Shimazu Tadashi
Mitsubishi Heavy Industries Ltd.
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Sugibayashi Tadahiko
Nec Corporation Device Platforms Research Laboratories
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Inoue Masahiko
Mitsubishi Heavy Industries Ltd.
関連論文
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- Characteristics of 0.25 μm Ferroelectric Nonvolatile Memory with a Pb(Zr, Ti)O_3 Capacitor on a Metal/Via-Stacked Plug
- 0.25μm FeRAM with CMVP (Capacitor-on-Metal/Via-Stacked-Plug) Memory Cell
- Gate-Last MISFET Structures and Process for Characterization of High-k and Metal Gate MISFETs(Microelectronic Test Structures)
- TiN as a Phosphorus Outdiffusion Barrier Layer for WSi_x/Doped-Polysilicon Structures (Special Issue on Sub-Half Micron Si Device and Process Technologies)
- Improvement of Thermal Stability of MRAM Device with SiN Protective Film Deposited by HDP CVD
- Control of Multiple Magnetic Domain Walls by Current in a Co/Ni Nano-Wire
- Domain Wall Motion Induced by Electric Current in a Perpendicularly Magnetized Co/Ni Nano-Wire
- Control of Domain Wall Position by Electrical Current in Structured Co/Ni Wire with Perpendicular Magnetic Anisotropy
- Single Shot Detection of the Magnetic Domain Wall Motion by Using Tunnel Magnetoresistance Effect
- Area Selective Flash Lamp Post-Deposition Annealing of High-k Film Using Si Photo Absorber for Metal Gate MISFETs with NiSi Source/Drain
- Stack Structure Dependence of Co/Ni Multilayer for Current-Induced Domain Wall Motion
- Shared Write-Selection Transistor Cell and Leakage-Replication Read Scheme for Large Capacity MRAM Macros
- Current-Induced Magnetic Domain Wall Motion in Co/Ni Nanowire at Low Temperature
- A Distributive Serial Multi-Bit Parallel Test Scheme for Large Capacity DRAMs (Special Section on High Speed and High Density Multi Functional LSI Memories)
- A Crossing Charge Recycle Refresh Scheme with a Separated Driver Sense-Amplifier for Gb DRAMs (Special Issue on ULSI Memory Technology)
- Improvement of Thermal Stability of Magnetoresistive Random Access Memory Device with SiN Protective Film Deposited by High-Density Plasma Chemical Vapor Deposition
- Magnetic Properties and Writing Characteristics of Magnetic Clad Lines in Magnetoresistive Random Access Memory Devices