Three-Level Charge-Pumping Technique for Grain-Boundary Trap Evaluation in Polysilicon Thin Film Transistors
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概要
- 論文の詳細を見る
- 1996-08-26
著者
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Kim Ohyun
Department Of Electronic And Electrical Engineering Pohang University Of Science And Technology
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Kim Ohyun
Department Of Electrical And Electronic Engineering
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KIM Kee-Jong
Department of Electronic and Electrical Engineering, Pohang University of Science and Technology
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Kim Kee-jong
Department Of Electronic And Electrical Engineering Pohang University Of Science And Technology
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