Gate Engineering to Prevent NMOS Dopant Channeling for Nanoscale CMOSFET Technology
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概要
- 論文の詳細を見る
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2004-04-30
著者
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LEE Hi
Dept. of Electronic Engineering, Chungnam National University
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Kim Yong
Dept. Of Electronics Engineering Chungnam National University
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Kim Dae
System Ic R&d Division Hynix Semiconductor Inc.
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Baek Seong
System Ic R&d Division Hynix Semiconductor Inc.
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Lee Heui
System Ic R&d Division Hynix Semiconductor Inc.
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Ji Hee
Dept. Of Electronics Engineering Chungnam National University
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PARK Sung
System IC R&D Division, Hynix Semiconductor Inc.
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KIM Jae
System IC R&D Division, Hynix Semiconductor Inc.
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CHANG Hoon
System IC R&D Division, Hynix Semiconductor Inc.
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LEE Jin
System IC R&D Division, Hynix Semiconductor Inc.
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KIM Kyoung
System IC R&D Division, Hynix Semiconductor Inc.
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SONG Byeung
System IC R&D Division, Hynix Semiconductor Inc.
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BAE Hui
System IC R&D Division, Hynix Semiconductor Inc.
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KIM Myung
System IC R&D Division, Hynix Semiconductor Inc.
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KANG Young
System IC R&D Division, Hynix Semiconductor Inc.
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Kang Young
System Ic R&d Division Hynix Semiconductor Inc.
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Lee J
System Ic R&d Division Hynix Semiconductor Inc.
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