Dual-Gate ZnO Thin-Film Transistors with SiNx as Dielectric Layer

スポンサーリンク

概要

• 論文の詳細を見る

• We report on the fabrication of coplanar dual-gate ZnO thin-film transistors with 200-nm thickness SiNx for both top and bottom dielectrics. The ZnO film was deposited by RF magnetron sputtering on SiO2/Si substrates at 100°C. And the thickness of ZnO film is compared with 100-nm and 40-nm. This TFT has a channel width of 100-µm and channel length of 5-µm. The fabricated coplanar dual-gate ZnO TFTs of 40-nm-thickness exhibits a field effect mobility of about 0.29cm2/V s, a subthreshold swing 420mV/decade, an on-off ratio 2.7×107, and a threshold voltage 0.9V, which are greatly improved characteristics, compared with conventional bottom-gate ZnO TFTs.

• 2011-05-01

著者

• KIM Young

  National Nanofab Center

• KANG Min

  National Nanofab Center

• JEONG Kang

  Dept. of Electronic Engineering, Chungnam National University

• OH Jae

  National Nanofab Center

• YOO Dong

  National Nanofab Center

• LEE Hi

  Dept. of Electronic Engineering, Chungnam National University

• Lee Hi

  Dept. Of Electronic Engineering Chungnam National University

• Jeong Kang

  Dept. Of Electronic Engineering Chungnam National University

• LEE Ga

  Dept. of Electronic Engineering, Chungnam National University

• Lee Ga‐won

  Dept. Of Electronic Engineering Chungnam National University

• Kim Young

  National Genome Information Center Korea Research Institute Of Bioscience And Biotechnology

• Lee Ga

  Dept. Of Electronic Engineering Chungnam National University

• Kim Yu

  Dept. Of Electronic Engineering Chungnam National University

• Kim Young

  National Center for Nanoprocess and Equipments, Honam Technology Division, Korea Institute of Industrial Technology, Gwangju 500-480, Korea

関連論文

• Dual-gate ZnO thin-film transistors with SiNx as Dielectric Layer(Session 1A : Emerging Device Technology 1)
• Dual-gate ZnO thin-film transistors with SiNx as Dielectric Layer(Session 1A : Emerging Device Technology 1)
• Cubic-Structured HfLaO for the Blocking Layer of a Charge-Trap Type Flash Memory Device
• The Suppressive Effect of β-Glucan on the Production of Tumor Necrosis Factor-Alpha in BV2 Microglial Cells
• Gate Engineering to Prevent NMOS Dopant Channeling for Nanoscale CMOSFET Technology
• Thermally Robust Nickel Silicide Process for Nano-Scale CMOS Technology(Si Devices and Processes, Fundamental and Application of Advanced Semiconductor Devices)
• 韓国の集約型ブロイラー生産施設において分離されたサルモネラの特徴(公衆衛生学)
• Inactivation of Vibrio vulnificus Hemolysin by Oligomerization but Not Proteolysis(Microbiology)
• SONOS-Type Flash Memory with HfO_2 Thinner than 4nm as Trapping Layer Using Atomic Layer Deposition
• HPLC Analysis and Pharmacokinetic Characteristics of 11-Hydroxyaclacinomycin X (ID-6105), a Novel Anthracycline, in Rats and Beagle Dogs(Biopharmacy)
• ヨークシャーブタQTL解析のためのマイクロサテライトマーカーの利用
• Mechanism of Date Retention Improvement by High Temperature Annealing of Al2O3 Blocking Layer in Flash Memory Device
• The Suppressive Effect of β-Glucan on the Production of Tumor Necrosis Factor-Alpha in BV2 Microglial Cells
• Multifunctional Drug Delivery System Using Starch-Alginate Beads for Controlled Release(Miscellaneous)
• Dual-Gate ZnO Thin-Film Transistors with SiNx as Dielectric Layer
• Continuous Synthesis of Carbon Nanotubes Using a Plasma-Enhanced Chemical Vapor Deposition System at Atmospheric Pressure
• Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer
• Improvement of Charge Retention in Flash Memory Devices by Very Light Doping of Lanthanum into an Aluminum-Oxide Blocking Layer
• Morphological and Electrical Properties of Self-Textured Aluminum-Doped Zinc Oxide Films Prepared by Direct Current Magnetron Sputtering for Application to Amorphous Silicon Solar Cells
• Gate Engineering to Prevent NMOS Dopant Channeling for Nanoscale CMOSFET Technology

もっと見る 閉じる

スポンサーリンク