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Silicon Systems Research Labs. | 論文
- C-11-2 垂直電界に関するバルクMOSFETとSOI-MOSFETの比較
- 素子微細化が真性半導体ボディSOI-MOSFETのI_向上効果に与える影響
- 素子微細化が真性半導体ボディSOI-MOSFETのI_向上効果に与える影響
- 真性チャネルSOI-MOSFETのV_ばらつきに対する電界の二次元効果の影響
- ストライプトゲート真性半導体チャネルSOI-MOSFETのしきい値制御に関するシミュレーション
- アクセプタからの電界の二次元的発散を考慮したSOI-MOSFETのしきい値電圧モデル
- 完全空乏化及び部分空乏化型SOI-MOSFETの短チャネル効果に関する容量ネットワークモデルに基づく比較
- SOIMOSFETの基板浮遊効果に及ぼすキャリア消滅の影響についての解析
- Simulated Device Design Optimization to Reduce the Floating Body Effect for Sub-Quarter Micron Fully Depleted SOI-MOSFETs (Special Issue on New Concept Device and Novel Architecture LSIs)
- Analysis of Short-Channel Schottky Source/Drain Metal-Oxide-Semiconductor Field-Effect Transistor on Silicon-on-Insulator Substrate and Demonstration of Sub-50-nm n-type Devices with Metal Gate
- 35 nm Metal Gate p-type Metal Oxide Semiconductor Field-Effect Transistor with PtSi Schottky Source/Drain on Separation by Implanted Oxygen Substrate
- Effects of buried oxide stress on thin-film silicon-on-insulator metal-oxide-semiconductor field-effect-transistor
- InP DHBT with 0.5μm Wide Emitter alongDirection toward BM-HBT with Narrow Emitter(Joint Special Issue on Heterostructure Microelectronics with TWHM 2000)
- Reduction of Base-Collector Capacitance inSubmicron InP/GalnAs Heterojunction Bipolar Transistors with Buried Tungsten Wires : Semiconductors
- First Fabrication of GaInAs/InP Buried Metal Heterojunction Bipolar Transistor and Reduction of Base-Collector Capacitance
- BC(Body-Contacted) SOI-CMOS Technology and Its Application to High Density Memory
- Effects of buried oxide stress on thin-film silicon-on-insulator metal-oxide-semiconductor field-effect-transistor
- EVALUATION OF SOI WAFERS USING C-V CHARACTERISTICS OF THIN-FILM MOS CAPACTOR
- EVALUATION OF SOI WAFERS USING C-V CHARACTERISTICS OF THIN-FILM MOS CAPACTOR
- ELFIN (ELevated Field INsulator) and SEP (S/D Elevated by Poly-Si Plugging) Process for Ultra-Thin SOI MOSFETs