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Microelectronics Research Laboratories | 論文
- High Performance (AlAs/n-GaAs Superlattice)/GaAs 2DEGFETs with Stabilized Threshold Voltage
- MOCVD GaAlAs Hetero-Buffer GaAs Low-Noise MESFETs : B-5: GaAs IC
- A Highly Stable Al-Si Contact to Mo-Silicided Shallow Junctions
- Selective Silicon Epitaxy Using Reduced Pressure Technique
- High-Speed E/D GaAs ICs with Closely-Spaced FET Electrodes : B-5: GaAs IC
- Power GaAs MESFETs with a Graded Recess Structure : B-1: GaAs IC
- Model for Al Etch-Rate Enhancement at Low Temperatures
- Local Loading Effect in Selective Silicon Epitaxy
- Sub-Micron Pattern Control Technology for Variable-Shaped EB Lithography : A-5: PROCESS TECHNOLOGY
- Silicon Selective Epitaxial Growth over Thick SiO_2 Islands
- Facet Formation in Selective Silicon Epitaxial Growth
- Device Layer Transfer Technique using Chemi-Mechanical Polishing
- Crystalline Defects in Selectively Epitaxial Silicon Layers
- Etching Characteristics for Organosilica
- Silicon Selective Epitaxial Growth and Electrical Properties of Epi/Sidewall Interfaces