IKENAGA Takeshi | Graduate School of Fundamental Science and Engineering, Waseda University

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概要

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著作論文

D-11-50 A Novel Fast Block Type Decision Algorithm for Intra Prediction in H.264/AVC High Profile
A-16-2 A Fast Mode Decision Algorithm for H.264/AVC Intra Prediction
Expression and Characterization of Human Rheumatoid Factor Single-Chain FV
Efficient Fully-Parallel LDPC Decoder Design with Improved Simplified Min-Sum Algorithms(VLSI Architecture for Communication/Server Systems,VLSI Technology toward Frontiers of New Market)
Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule(VLSI Architecture,VLSI Design and CAD Algorithms)
Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving(Adaptive Signal Processing, Recent Advances in Circuits and Systems-Part 1)
A-16-11 Level C+ Bandwidth Reduction Method for MPEG-2 to H.264 Transcoding
A-16-1 Group-Based Prediction Scheme on Multiple Reference Frame Fractional Motion Estimation in H.264/AVC
D-11-70 Adaptive Spatial EC based on Numerical Measures of Edge Statistical Model
An adaptive error concealment order in H.264/AVC (VLSI設計技術)
An adaptive error concealment order in H.264/AVC (集積回路)
D-11-18 An Edge Information Based Block Size Decision Method for Intra Mode Decision in H.264/AVC
D-11-21 Macroblock Level Rate Control for H.264/AVC Based on Model Parameter Update and Weighted Reference Calculation
D-11-20 Bayesian Decision Based All-Zero Block Detection Algorithm in H.264/AVC
A-4-15 Cross Low Pass Filter Based Subsampling Algorithm for H.264/AVC Motion Estimation
BS-12-20 VLSI Design of Level C Bandwidth Reduction Scheme for MPEG-2 to H.264/AVC Transcoding(BS-12. Network Planning, Control, and Management)
Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation(Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Low-Power Partial Distortion Sorting Fast Motion Estimation Algorithms and VLSI Implementations(Advanced Image Technology)
A VLSI Architecture for Variable Block Size Motion Estimation in H.264/AVC with Low Cost Memory Organization(VLSI Architecture,VLSI Design and CAD Algorithms)
Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
261MHz Parallel Tree Architecture for Full Search Variable Block Size Motion Estimation in H.264/AVC
261MHz Parallel Tree Architecture for Full Search Variable Block Size Motion Estimation in H.264/AVC
Geometrical, Physical and Text/Symbol Analysis Based Approach of Traffic Sign Detection System(Advanced Image Technology)
A Highly Parallel Architecture for Deblocking Filter in H.264/AVC(Parallel and/or Distributed Processing Systems, Recent Advances in Circuits and Systems-Part1)
D-12-69 1D-based 2D Gaussian Convolution Unit Based Hardware Accelerator for Gassian & DoG Pyramid Construction in SIFT
D-12-95 A GMM based Foreground Extraction Algorithm in Complex Background for Surveillance System
Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique
Standard Deviation and Intra Prediction Mode Based Adaptive Spatial Error Concealment (SEC) in H.264/AVC
A High Throughput LDPC Decoder Design Based on Novel Delta-value Message-passing Schedule
A Selective Video Encryption Scheme for MPEG Compression Standard(Application, Cryptography and Information Security)
Adaptive Search Range Algorithms for Variable Block Size Motion Estimation in H.264/AVC
Content-Aware Fast Motion Estimation for H.264/AVC
A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Schedule
An Ultra-Low Bandwidth Design Method for MPEG-2 to H.264/AVC Transcoding
A-6-12 Prediction-based Center-bias Fast Fractional Motion Estimation Algorithm for H.264/AVC
Scale invariance based salient contour detection (「膨大化する画像データのための高度画像入出力技術」[画像電子]学会創立35周年記念論文特集号)
A Novel Cache Replacement Policy via Dynamic Adaptive Insertion and Re-Reference Prediction
A Drift-Constrained Frequency-Domain Ultra-Low-Delay H.264/SVC to H.264/AVC Transcoder with Medium-Grain Quality Scalability for Videoconferencing
Content-Aware Write Reduction Mechanism of 3D Stacked Phase-Change RAM Based Frame Store in H.264 Video Codec System

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