Shimizu Kazunori | Ips Waseda University

スポンサーリンク

概要

• SHIMIZU Kazunoriの詳細を見る
• 同名の論文著者
• Ips Waseda Universityの論文著者

関連著者

• IKENAGA Takeshi

  IPS, Waseda University

• Goto Satoshi

  Waseda Univ. Jpn

• Ikenaga Takeshi

  Waseda Univ.

• Ikenaga Takeshi

  Graduate School Of Information Production And System Waseda University

• Ishikawa Tatsuyuki

  Graduate School Of Information Production And Systems Waseda University

• SHIMIZU Kazunori

  IPS, Waseda University

• Shimizu Kazunori

  Ips Waseda University

• GOTO Satoshi

  Graduate School of Information, Production and Systems, Waseda University

• Ikenaga Takeshi

  Graduate school of Information, Production and Systems, Waseda University

• Goto Satoshi

  Graduate School Of Information Production And System Waseda University

• IKENAGA Takeshi

  Graduate School of Fundamental Science and Engineering, Waseda University

• Goto Satoshi

  Graduate School of Infomlation Production and Systems Waseda University

• Shimizu Kazunori

  Graduate School Of Information Production And Systems Waseda University

• TOGAWA Nozomu

  Dept. of Computer Science, Waseda University

• Togawa Nozomu

  Dept. Of Computer Science Waseda University

• Togawa Nozomu

  Dept. of Computer Science and Engineering, Waseda University

• Ikenaga Takeshi

  Graduate School Of Ips Waseda University

• ISHIKAWA Tatsuyuki

  Graduate School of Information, Production and Systems, Waseda University

• LIU Qin

  IPS, Waseda University

• GOTO Satoshi

  IPS, Waseda University

• Wang Qi

  Graduate School Of Information Production And Systems Waseda University

• TOGAWA Nozomu

  Department of Computer Science, Waseda University

• Liu Qin

  Nanjing Univ.

• SHIMIZU Kazunori

  Dept. of Computer Science, Waseda University

• HIRATSUKA Seiichiro

  IPS, Waseda University

• USHIKI Shinsuke

  IPS, Waseda University

• Ushiki Shinsuke

  Ips Waseda University

• Hiratsuka Seiichiro

  Ips Waseda University

• Togawa Nozomu

  Department Of Computer Science And Engineering Waseda University

もっと見る 閉じる

著作論文

• Efficient Fully-Parallel LDPC Decoder Design with Improved Simplified Min-Sum Algorithms(VLSI Architecture for Communication/Server Systems,VLSI Technology toward Frontiers of New Market)
• Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule(VLSI Architecture,VLSI Design and CAD Algorithms)
• Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule(Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
• Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving(Adaptive Signal Processing, Recent Advances in Circuits and Systems-Part 1)
• Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique
• A 41mW VGA【triple bond】fps Quadtree Video Encoder for Video Surveillance Systems

スポンサーリンク