Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique

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概要

• 論文の詳細を見る
• 2008-04-01

著者

• IKENAGA Takeshi

  IPS, Waseda University

• GOTO Satoshi

  Graduate School of Information, Production and Systems, Waseda University

• Ikenaga Takeshi

  Graduate school of Information, Production and Systems, Waseda University

• Goto Satoshi

  Waseda Univ. Jpn

• Ikenaga Takeshi

  Waseda Univ.

• Ikenaga Takeshi

  Graduate School Of Information Production And System Waseda University

• Ikenaga Takeshi

  Graduate School Of Ips Waseda University

• TOGAWA Nozomu

  Dept. of Computer Science, Waseda University

• Ishikawa Tatsuyuki

  Graduate School Of Information Production And Systems Waseda University

• Togawa Nozomu

  Dept. Of Computer Science Waseda University

• SHIMIZU Kazunori

  Dept. of Computer Science, Waseda University

• SHIMIZU Kazunori

  IPS, Waseda University

• Goto Satoshi

  Graduate School Of Information Production And System Waseda University

• Shimizu Kazunori

  Ips Waseda University

• IKENAGA Takeshi

  Graduate School of Fundamental Science and Engineering, Waseda University

• Togawa Nozomu

  Dept. of Computer Science and Engineering, Waseda University

• Goto Satoshi

  Graduate School of Infomlation Production and Systems Waseda University

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