Takata Hidehiro | Renesas Technol. Corp. Itami‐shi Jpn
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概要
関連著者
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Takata Hidehiro
Renesas Technol. Corp. Itami‐shi Jpn
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Takata Hidehiro
Renesas Electronics Corporation
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TAKATA Hidehiro
Renesas Technology
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Nii Koji
Renesas Electronics Corporation
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NAKASE Yasunobu
Renesas Technology
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IWADE Shuhei
Osaka Institute of Technology
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Nakase Yasunobu
The System Lsi Laboratory Mitsubishi Electric Corporation
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SHIMIZU Toru
Renesas Technology Corp.
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AKIYAMA Rei
Renesas Device Design
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NUNOMURA Yasuhiro
Renesas Technology
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ITOH Niichi
Renesas Technology
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ARAKAWA Takahiko
Renesas Technology
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Akiyama Rei
Renesas Design Corporation
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Itoh N
Semiconductor Company Toshiba Corporationthe Authors Are With Semiconductor Company Toshiba Corporat
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Takata H
Renesas Technology
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Shimizu Toru
Renesas Electronics Corp.
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NAKASE Yasunobu
Renesas Electronics Corp.
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Nagata Makoto
the Department of Geriatrics, Tokyo Womens Medical University
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NAGATA Makoto
Department of Computer and Systems Engineering, Kobe University
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Shibagaki Takeshi
Renesas Technology
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ARIMOTO Kazutami
Renesas Technology
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Nii Koji
Renesas Technology Corporation
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Nii K
Renesas Technol. Corp. Itami‐shi Jpn
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Yoshida K
Renesas Technol. Corp. Itami‐shi Jpn
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Makino Hiroshi
Renesas Technology Corporation
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SHIMADA Takahiro
Renesas Technology
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HATTORI Toshihiro
Renesas Technology Corporation
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Yoshida Kanako
Renesas Technology Corporation
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Makino H
Mitsubishi Electric Corp. Itami‐shi Jpn
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Yamanaka Toshio
The Graduate School Of Advanced Sciences Of Matter Hiroshima University:texas Instruments Japan Limi
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KURAFUJI Takashi
Renesas Technology
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IMAMURA Yukinaga
Renesas Device Design
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YAMANAKA Tadao
Renesas Device Design
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IWABU Atsushi
Renesas Device Design
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YASUDA Shutarou
Renesas Device Design
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MIWA Toshitsugu
Renesas Technology
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KAGEMOTO Tetsuya
Renesas Technology
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YOSHIOKA Nobuharu
Renesas Technology
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KONDO Hiroyuki
Renesas Technology
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KOYAMA Masayuki
Renesas Technology
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Ipposhi Takashi
Renesas Technology Corp.
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Ipposhi Takashi
Renesas Technology Corporation
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Kurimoto Masanori
Renesas Technology Corporation
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SATO Hisakazu
Renesas Technology Corporation
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ITO Hironobu
Renesas Technology Corporation
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NAKANISHI Jingo
Renesas Technology Corporation
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YAMADA Akira
Renesas Technology Corporation
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HIRANO Yuichi
Renesas Technology Corporation
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Yamanaka T
Renesas Device Design
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Shimada T
Renesas Technol. Itami‐shi Jpn
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Takata Hidehiro
Renesas Technology Corporation
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Yamada A
Wireless Laboratories Ntt Docomo Inc.
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FUKAZAWA Mitsuya
Department of Computer Science and Systems Engineering, Graduate School of Engineering, Kobe Univers
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Fukazawa Mitsuya
Department Of Computer Science And Systems Engineering Graduate School Of Engineering Kobe Universit
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Nagata Makoto
Department Of Computer Science And Systems Engineering Graduate School Of Engineering Kobe Universit
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HASEGAWA Atsushi
Renesas Technology
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Hattori Toshihiro
Renesas Technology
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Nagata Makoto
Department Of Computer And Systems Engineering Kobe University
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Shimizu Toru
Renesas Technology Corporation
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Shimizu Toru
Renesas Electronics Corporation
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Arimoto Kazutami
Renesas Electronics Corp.
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Kondo Hiroyuki
Renesas Electronics Corporation
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Nagata Makoto
The Department Of Information Science Graduate School Of System Informatics Kobe University
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Sawada Takuya
The Department Of Information Science Graduate School Of System Informatics Kobe University
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TOSHIKAWA Taku
the Department of Information Science, Graduate School of System Informatics, Kobe University
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YOSHIKAWA Kumpei
the Department of Information Science, Graduate School of System Informatics, Kobe University
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Toshikawa Taku
The Department Of Information Science Graduate School Of System Informatics Kobe University
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Yoshikawa Kumpei
The Department Of Information Science Graduate School Of System Informatics Kobe University
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Nagata Makoto
the Department of Geriatrics, Tokyo Women's Medical University
著作論文
- Selective-Sets Resizable Cache Memory Design for High-Performance and Low-Power CPU Core(Low-Power System LSI, IP and Related Technologies)
- A Low-Power Microcontroller with Body-Tied SOI Technology(Low-Power System LSI, IP and Related Technologies)
- Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations
- Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS(Digital,Low-Power, High-Speed LSIs and Related Technologies)
- Evaluation of SRAM-Core Susceptibility against Power Supply Voltage Variation