Hattori Toshihiro | Renesas Technology

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概要

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著作論文

A 4500 MIPS/W, 86μA Resume-Standby, 11μA Ultra-Standby Application Processor for 3G Cellular Phones(Digital, Low-Power LSI and Low-Power IP)
Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core (Low Power Techniques, VLSI Design Technology in the Sub-100nm Era)
Multi-Core/Multi-IP Technology for Embedded Applications
Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS(Digital,Low-Power, High-Speed LSIs and Related Technologies)
A Physical Synthesis Methodology for Multi-Threshold-Voltage Design in Low-Power Embedded Processor(Low-Power System LSI, IP and Related Technologies)

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