Lee Deok-hyung | Process Development Team Memory Division Semiconductor Business Samsung Electronics Co. Ltd.

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著作論文

SiGe Source and Drain for Performance Boosting of Peripheral PMOS Transistor in High Density 4 Gb DRAM Technologies(Session 7A Silicon Devices IV,AWAD2006)
SiGe Source and Drain for Performance Boosting of Peripheral PMOS Transistor in High Density 4 Gb DRAM Technologies(Session 7A Silicon Devices IV,AWAD2006)
SiGe Source and Drain for Performance Boosting of Peripheral PMOS Transistor in High Density 4Gb DRAM Technologies
3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
Device Performance Improvement Based on Transient Enhanced Diffusion Suppression in the Deep Sub-Quarter Micron Scale
Device Performances Improvement Based on TED Suppression in Deep Sub-Quarter Micron Regime
Performance of DRAM Cell Transistor with Thermal Desorption Silicon Etching (TDSE) and Selective Si Channel Epi Techniques

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