Chung U-In | Memory Division, Samsung Electronics Co.
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概要
関連著者
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Chung U-In
Memory Division, Samsung Electronics Co.
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Chung U-in
Memory Division Samsung Electronics Co.
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Moon J‐t
Process Development Team Memory Division Semiconductor Business Samsung Electronics Co. Ltd.
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Moon Joo-tae
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Lee Deok-hyung
Process Development Team Memory Division Semiconductor Business Samsung Electronics Co. Ltd.
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Lee Jong-Wook
Memory Division, Samsung Electronics Co.
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Lee Deok-Hyung
Memory Division, Samsung Electronics Co.
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Shin Yu-Gyun
Memory Division, Samsung Electronics Co.
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Moon Joo-Tae
Memory Division, Samsung Electronics Co.
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Moon Joo
Process Development Team Memory Division Samsung Electronics Co. Ltd.
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Lee Jae-mun
Division Of Hematolgoy Catholic Hematopoietic Stem Cell Transplantation Center College Of Medicine T
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Lee Jong-wook
Process Development Team Memory Division Semiconductor Business Samsung Electronics Co. Ltd.
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Chung U‐i
Process Development Team Memory Division Semiconductor Business Samsung Electronics Co. Ltd.
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Chung U-in
Semiconductor R & D Center Samsung Electronics Co.ltd.
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Moon Joo-tae
Memory Division Samsung Electronics Co.
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Shin Yu-gyun
Memory Division Samsung Electronics Co.
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Lee Deok-hyung
Memory Division Samsung Electronics Co.
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Chung U-in
Memory Division Samsung Electronics Co. Ltd.
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Kim C.-s.
Memory Division Samsung Electronics Co. Ltd.
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NOH Y.
Memory Division, Samsung Electronics Co., Ltd.
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KIM J.
Memory Division, Samsung Electronics Co., Ltd.
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KOO B.
Memory Division, Samsung Electronics Co., Ltd.
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HEO J.
Memory Division, Samsung Electronics Co., Ltd.
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KIM D.-C.
Memory Division, Samsung Electronics Co., Ltd.
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SHIN Y.
Memory Division, Samsung Electronics Co., Ltd.
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MOOM J.
Memory Division, Samsung Electronics Co., Ltd.
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Kim D.-c.
Memory Division Samsung Electronics Co. Ltd.
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Moom J.
Memory Division Samsung Electronics Co. Ltd.
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Kim J.
Memory Division Samsung Electronics Co. Ltd.
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Noh Y.
Memory Division Samsung Electronics Co. Ltd.
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Heo J.
Memory Division Samsung Electronics Co. Ltd.
著作論文
- 3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
- 3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
- Highly Reliable and Manufacturable Low-Temperature Plasma Assisted Oxidation for High Density SRAM with Double Stacked Cell Structure