Layout-Independent Transistor with Stress-Controlled and Highly Manufacturable Shallow Trench Isolation Process
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概要
- 論文の詳細を見る
In this paper, in order to obtain layout-independent transistors in recent fine-pitched LSI circuits, a completely stress-controlled shallow trench isolation (STI) process is proposed. In this process, a single-layered spin-on dielectric (SOD) film is used for STI gap filling without employing a complex hybrid structure. With this technique, the mechanical stress caused by STI is markedly suppressed. Subsequently, drain current ($I_{\text{d}}$) modulation due to the STI stress is inhibited successfully. Thus, this technique is a very promising 45 nm node STI scheme with a high performance and a high reliability.
- 2007-04-30
著者
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ISHIBASHI Masato
Process Technology Development Division, Renesas Technology Corp.
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HORITA Katsuyuki
Process Technology Development Division, Renesas Technology Corp.
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KUROI Takashi
Process Technology Development Division, Renesas Technology Corp.
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Umeda Hiroshi
Process Development Dept. Wafer Process Engineering Development Div. Lsi Manufacturing Unit Renesas
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Yamashita Tomohiro
Process Technology Development Div. Renesas Technology Corp.
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Inoue Yasuo
Process Technology Development Div. Renesas Technology Corp.
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Kawahara Takaaki
Process Technology Development Division, Production and Technology Unit, Renesas Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
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Kawahara Takaaki
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Horiba Yasutaka
Department of Electrical Engineering and Computer Science, Faculty of Engineering, Kansai University, Suita, Osaka 564-8680, Japan
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Inoue Yasuo
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Yamashita Tomohiro
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Kuroi Takashi
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Ikeda Taketoshi
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Umeda Hiroshi
Process Development Department, Process Technology Development Division, Production and Technology Unit, RENESAS Technology Corporation, 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
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Umeda Hiroshi
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Horita Katsuyuki
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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Ishibashi Masato
Process Technology Development Division, Renesas Technology Corp., Itami, Hyogo 664-0005, Japan
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