A Minimum-Latency Linear Array FFT Processor for Robotics

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概要

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• In the applications of the fast Fourier transform (FFT) to real-world computation such as robot vision, high-speed processing with small latency is an important issue. In this paper, we propose a linear array processor for the minimum-latency FFT computation. The processor is constructed by identical butterfly elements (BE's). The key concept to minimize the latency is that each BE generates its output data immediately after its input data become available, with 100% utilization of its arithmetic unit. We also introduce the real-valued FFT to perform the complex-valued FFT. We utilize a double linear array structure so that the parallel processing can be realized without communication between the linear arrays. As a result, the hardware amount of a single BE is reduced to half that of conventional designs. The latency of the proposed FFT processor is greatly reduced in comparison with conventional linear array FFT processors.

• 社団法人電子情報通信学会の論文
• 1993-06-25

著者

• Kameyama Michitaka

  Graduate School of Information Sciences, Tohoku University

• Kameyama Michitaka

  Graduate School Of Information Science Tohoku University

• Kameyama Michitaka

  Graduate School Of Information Sciences And Also With The Faculty Of Engineering Tohoku University

• Kittichaikoonkit Somchai

  Graduate School of Engineering, Tohoku University

• Kittichaikoonkit Somchai

  Graduate School Of Engineering Tohoku University

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