An On/Off Link Regulation for Low-Power InfiniBand

スポンサーリンク

概要

• 論文の詳細を見る
• 2009-08-04

著者

• KOIBUCHI Michihiro

  National Institute of Informatics

• Amano Hideharu

  Keio Univ. Yokohama Jpn

• Amano Hideharu

  Graduate School Of Science And Technology Keio University

• Matsutani Hiroki

  Keio Univ. Yokohama Jpn

• Watanabe Takafumi

  Internet Initiative Japan Inc.

• MONTANANA JOSE

  National Institute of Informatics

• HIROYASU TOMOYUKI

  Graduate School of Engineering, Doshisha University

• MATSUTANI HIROKI

  Research center for advanced science and technology (RCAST), The University of Tokyo

関連論文

• Performance and cost evaluations of on-chip network topologies in FPGAs (リコンフィギャラブルシステム)
• Architectural Design of Next-Generation Science Information Network(Advanced Transfer Technologies for the Next Generation Network)
• Evaluation of a multicore reconfigurable architecture (VLSI設計技術)
• Evaluation of a multicore reconfigurable architecture (システムLSI設計技術)
• Evaluation of a multicore reconfigurable architecture (リコンフィギャラブルシステム)
• Evaluation of a multicore reconfigurable architecture (コンピュータシステム)
• An On/Off Link Regulation for Low-Power InfiniBand
• A Link Removal Methodology for Application-Specific Networks-on-Chip on FPGAs
• A link removal methodology for application-specific (リコンフィギャラブルシステム)
• A Port Combination Methodology for Application-Specific Networks-on-Chip on FPGAs(Reconfigurable System and Applications,Reconfigurable Systems)
• A temporal correlation based port combination methodology for application-specific networks-on-chip on FPGAs (計算機アーキテクチャ・2007年並列/分散/協調処理に関する『旭川』サマー・ワークショップ(SWoPP旭川2007)--研究会・連続同時開催)
• A Parametric Study of Packet-Switched FPGA Overlay Networks
• A Preemption Algorithm for a Multitasking Environment on Dynamically Reconfigurable Processors
• A method for saving and restoring context data of hardware tasks on the dynamically reconfigurable processor (システムLSI設計技術)
• A method for saving and restoring context data of hardware tasks on the dynamically reconfigurable processor (VLSI設計技術)
• A method for saving and restoring context data of hardware tasks on the dynamically reconfigurable processor (コンピュータシステム)
• A method for saving and restoring context data of hardware tasks on the dynamically reconfigurable processor (リコンフィギャラブルシステム)
• An On/Off Link Regulation for Low-Power InfiniBand
• A Leakage Efficient Data TLB Design for Embedded Processors
• A Mapping Method for Multi-Process Execution on Dynamically Reconfigurable Processors
• A Leakage Efficient Instruction TLB Design for Embedded Processors
• Partial Reconfiguration of Flux Limiter Functions in MUSCL Scheme Using FPGA
• A Fully Optical Ring Network-on-Chip with Static and Dynamic Wavelength Allocation
• Vertical Link On/Off Regulations for Inductive-Coupling Based Wireless 3-D NoCs

もっと見る 閉じる

スポンサーリンク