Strained-Si for CMOS 65nm node : Si_<0.8>Ge_<0.2> SRB or "Low Cost" approach?
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概要
- 論文の詳細を見る
- 2004-09-15
著者
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LEVERD F.
STMicroelectronics
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SKOTNICKI T.
STMicroelectronics
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LAVIRON C.
CEA-LETI
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BOEUF F.
STMicroelectronics
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JULLIAN S.
NXP Semiconductors
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MORIN P.
STMicroelectronics
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SKOTNICKI T.
ST Microelectronics
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Hartmann J.
Cea-leti
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JULLIAN S.
Philips
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Bensahel D.
Nxp Semiconductors
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Perrot C.
Stmicroelectronics
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PAYET F.
STMicroelectronics
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CASANOVA N.
STMicroelectronics
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CAMPIDELLI Y.
STMicroelectronics
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VILLANI N.
STMicroelectronics
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KERMARREC O.
STMicroelectronics
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EMONET N.
STMicroelectronics
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CARRON V.
CEA-LETI
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ARNAUD F.
STMicroelectronics
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BENSAHEL D.
STMicroelectronics
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