Design of a Mutated Adder and Its Optimization Using ILP Formulation(Digital Circuits and Computer Arithmetic, <Special Section>Recent Advances in Circuits and Systems-Part 1)

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概要

• 論文の詳細を見る

• A mutated adder architecture utilizing a mixture of carry propagation schemes is proposed to design a delay-area efficient adder which were not available in an ordinary design space. Further, we develop an optimization method based on integer linear programming to search the expanded design space of the mutated adder.

• 社団法人電子情報通信学会の論文
• 2005-07-01

著者

• Lee Jeong

  Department of Obstetrics and Gynaecology, College od Medicine, Soonchunhyang University

• Kim Suk

  Department Of Information And Communications Gwangju Institute Of Science And Technology

• KIM Kiseon

  Department of Information and Communications, Gwangju Institute of Science and Technology

• KIM Suk

  Samsung Advanced Institute of Technology

• Kim Kiseon

  Department Of Information And Communications Gwangju Institute Of Science And Technology

• Kim Kiseon

  Department Of Information And Communication At The Gwangju Institute Of Science And Technology (gist

• Lee Jeong

  Department Of Clothing And Textiles Gyeongsang National University

• Lee Jeong‐gun

  Hallym Univ. Kor

• Lee Jeong

  Department Of Animal Science And Biotechnology Kyungpook National University

• Lee Jeong

  Department Of Anesthesiology And Pain Medicine Yonsei University College Of Medicine

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