Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size(Reliability, Maintainability and Safety Analysis)
スポンサーリンク
概要
- 論文の詳細を見る
In this paper, we present a model for evaluating the effectiveness of (2, 1, m) convolutional-code-based packet-level FEC, under the condition of a limited buffer size in which the number of available packets is restricted for recovery. We analytically derive the post-reconstruction receiving rate, i.e., the probability that a lost packet is received or recovered before the buffer limit is reached. We show numerical examples of the analytical results and demonstrate that the buffer size at the same level as m gives sufficient recovery performance.
- 社団法人電子情報通信学会の論文
- 2005-04-01
著者
-
ARAI Masayuki
Tokyo Metropolitan University
-
IWASAKI Kazuhiko
Tokyo Metropolitan University
-
Fukumoto Satoshi
Tokyo Metropolitan Univ. Hachioji‐shi Jpn
-
Fukumoto Satoshi
Graduate School Of Engineering Tokyo Metropolitan University
-
Iwasaki K
Tokyo Metropolitan Univ. Tokyo Jpn
-
Iwasaki Kazuhiko
Graduate School Of Engineering Tokyo Metropolitan University
-
Iwasaki Kazuhiko
Faculty Of System Design Tokyo Metropolitan University
-
Arai Masayuki
Tokyo Metropolitan Univ. Tokyo Jpn
-
ARAI Masayuki
Graduate School of Engineering, Tokyo Metropolitan University
-
Fukumoto Satoshi
Graduate School Of Engineering Hiroshima University
-
Arai Masayuki
Graduate School Of Engineering Tokyo Metropolitan University
関連論文
- Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression
- Note on programmable on-product clock generation (OPCG) circuitry for low power aware delay test (ディペンダブルコンピューティング)
- Deterministic Built-in Test for Logic Circuits Having Multiple Clocks
- High Quality Delay Test Generation Based on Multiple-Threshold Gate-Delay Fault Model(Special Issue on Test and Verification of VLSI)
- Deterministic Built-in Test with Neighborhood Pattern Generator
- Analytical Model on Hybrid State Saving with a Limited Number of Checkpoints and Bound Rollbacks(Reliability, Maintainability and Safety Analysis)
- Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size(Reliability, Maintainability and Safety Analysis)
- Application of Partially Rotational Scan Technique with Tester IP for Processor Circuits(Scan Testing)(Test and Verification of VLSI)
- Seed Selection Procedure for LFSR-Based Random Pattern Generators(Timing Verification and Test Generation)(VLSI Design and CAD Algorithms)
- High-Assurance Video Conference System over the Internet(Network Systems and Applications)(Assurance Systems and Networks)
- A Technique for Constructing Dependable Internet Server Cluster(Fault Tolerance)
- C-24 Implementation and Experiments on Dependable Video Conference System
- Fault-Tolerance Design for Muiticast Using Convolutional-Code-Based FEC and Its Analytical Evaluation
- Analytical Evaluation of Internet Packet Loss Recovery Using Convolutional Codes
- Analysis of Aliasing Probability for MISRs by Using Complete Weight Distributions
- Hybrid BIST Design for n-Detection Test Using Partially Rotational Scan(Special Issue on Test and Verification of VLSI)
- Mesh Spiral and Mesh Random Networks (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
- Technique to Diagnose Open Defects that Takes Coupling Effects into Consideration(Dependable Computing)
- Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression
- Test Data Compression for Scan-Based BIST Aiming at 100x Compression Rate
- Study on Test Data Reduction Combining Illinois Scan and Bit Flipping
- Study on Expansion of Convolutional Compactors over Galois Field
- Optimal Checkpointing Policies Using the Checkpointing Density
- Reduction of Area per Good Die for SoC Memory Built-In Self-Test
- Analysis of Probabilistic Trapezoid Protocol for Data Replication