Iwasaki Kazuhiko | Faculty Of System Design Tokyo Metropolitan University
スポンサーリンク
概要
関連著者
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Iwasaki Kazuhiko
Faculty Of System Design Tokyo Metropolitan University
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IWASAKI Kazuhiko
Tokyo Metropolitan University
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Iwasaki K
Tokyo Metropolitan Univ. Tokyo Jpn
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ARAI Masayuki
Tokyo Metropolitan University
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Arai Masayuki
Tokyo Metropolitan Univ. Tokyo Jpn
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Fukumoto Satoshi
Tokyo Metropolitan Univ. Hachioji‐shi Jpn
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Fukumoto Satoshi
Graduate School Of Engineering Tokyo Metropolitan University
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Iwasaki Kazuhiko
Graduate School Of Engineering Tokyo Metropolitan University
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ARAI Masayuki
Graduate School of Engineering, Tokyo Metropolitan University
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Fukumoto Satoshi
Graduate School Of Engineering Hiroshima University
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Arai Masayuki
Graduate School Of Engineering Tokyo Metropolitan University
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Iwasaki Kazuhiko
Faculty Of Engineering Chiba University
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OHARA Mamoru
Graduate School of Engineering, Tokyo Metropolitan University
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ICHINO Kenichi
Tokyo Metropolitan University
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KUROSU Hitoshi
Graduate School of Engineering, Tokyo Metropolitan University
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Ohara Mamoru
Graduate School Of Engineering Tokyo Metropolitan University:tokyo Metropolitan Industry Technology
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Kurosu Hitoshi
Graduate School Of Engineering Tokyo Metropolitan University
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Arai Masayuki
Faculty Of System Design Tokyo Metropolitan University
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UZZAMAN Anis
Cadence Design Systems, Inc.
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KELLER Brion
Cadence Design Systems, Inc.
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Keller Brion
Cadence Design Systems Inc.
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Uzzaman Anis
Cadence Design Systems Inc.:faculty Of System Design Tokyo Metropolitan University
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Arai Masayuki
Faculty of System Design, Tokyo Metropolitan University
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Suzuki Ryo
Graduate School Of Pharmaceutical Sciences Nagoya City Univ.
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WATANABE Ko-ichi
Tokyo Metropolitan University
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YAMAGUCHI Anna
Graduate School of Engineering, Tokyo Metropolitan University
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Watanabe K
Tokyo Metropolitan University
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Uzzaman Anis
Cadence Design Systems Inc.
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Suzuki R
Electrotechnical Lab. Ibaraki
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Suzuki R
Graduate School Of Engineering Tokyo Metropolitan University
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Yamaguchi Anna
Graduate School Of Engiueering Tokyo Metropolitan University
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Suzuki Ryo
Graduate School Of Bioresources Mie University
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Youn Hee
School of Information and Communications Engineering Sungkyunkwan University
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FOUTZ Brian
Cadence Design Systems, Inc.
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BHATIA Sandeep
Cadence Design Systems, Inc.
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BARTENSTEIN Thomas
Cadence Design Systems, Inc.
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KAJIHARA Seiji
Kyushu Institute of Technology
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Snethen Tom
Cadence Design Systems Inc.
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Tsuchiya Toshio
Tokyo Metropolitan Industrial Technology Research Institute
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Yamada Kazunori
Tokyo Metropolitan Industrial Technology Research Institute
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Gupta Sandeep
Department of Electrical Engineering Systems, University of Southern California
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Nagvajara Prawat
Electrical and Computer Engineering, Drexel University
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Kasami Tadao
Faculty of Graduate School of Information Science, Nara Institute of Science and Technology
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ASAKAWA Takeshi
Tokyo Metropolitan University
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Kasami Tadao
Faculty Of Graduate School Of Information Science Nara Institute Of Science And Technology
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Iwasaki Kazuhiko
Faculty Of Engineering Tokyo Metropolitan University
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FURUTA Akinori
Faculty of Engineering, Chiba University
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Bartenstein Thomas
Cadence Design Systems Inc.
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Foutz Brian
Cadence Design Systems Inc.
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MATSUO Tatsuru
Fujitsu Laboratories Ltd.
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HIRAIDE Takahisa
Fujitsu Laboratories Ltd.
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KONISHI Hideaki
Fujitsu Ltd.
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EMORI Michiaki
Fujitsu Ltd.
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AIKYO Takashi
Fujitsu Ltd.
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FUKUMOTO Satoshi
Faculty of System Design, Tokyo Metropolitan University
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Nakao Michinobu
Renesas Technology Corp.
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Furuta A
Faculty Of Engineering Chiba University
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Bhatia Sandeep
Cadence Design Systems Inc.
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Youn Hee
School Of Information And Communication Engineering Sungkyunkwan University
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Gupta Sandeep
Department Of Electrical Engineering Systems University Of Southern California
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Kajihara Seiji
Kyushu Insteitute Of Technology
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Youn Hee
School Of Electrical & Computer Engineering Sungkyunkwan University
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Furuta Akinori
Faculty Of Engineering Chiba University
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Suzuki Iwao
Renesas Technology Corp.
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ENDO Tatsuro
Faculty of System Design, Tokyo Metropolitan University
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Nagvajara Prawat
Electrical And Computer Engineering Drexel University
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Endo Tatsuro
Faculty Of System Design Tokyo Metropolitan University
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Kajihara Seiji
Kyushu Inst. Technol. Iizuka‐shi Jpn
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NAKAO Michinobu
Renesas Electronics Corp.
著作論文
- Note on programmable on-product clock generation (OPCG) circuitry for low power aware delay test (ディペンダブルコンピューティング)
- Analytical Model on Hybrid State Saving with a Limited Number of Checkpoints and Bound Rollbacks(Reliability, Maintainability and Safety Analysis)
- Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size(Reliability, Maintainability and Safety Analysis)
- Application of Partially Rotational Scan Technique with Tester IP for Processor Circuits(Scan Testing)(Test and Verification of VLSI)
- Seed Selection Procedure for LFSR-Based Random Pattern Generators(Timing Verification and Test Generation)(VLSI Design and CAD Algorithms)
- High-Assurance Video Conference System over the Internet(Network Systems and Applications)(Assurance Systems and Networks)
- A Technique for Constructing Dependable Internet Server Cluster(Fault Tolerance)
- C-24 Implementation and Experiments on Dependable Video Conference System
- Fault-Tolerance Design for Muiticast Using Convolutional-Code-Based FEC and Its Analytical Evaluation
- Analytical Evaluation of Internet Packet Loss Recovery Using Convolutional Codes
- Analysis of Aliasing Probability for MISRs by Using Complete Weight Distributions
- Hybrid BIST Design for n-Detection Test Using Partially Rotational Scan(Special Issue on Test and Verification of VLSI)
- Mesh Spiral and Mesh Random Networks (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
- Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression
- Test Data Compression for Scan-Based BIST Aiming at 100x Compression Rate
- Study on Test Data Reduction Combining Illinois Scan and Bit Flipping
- Study on Expansion of Convolutional Compactors over Galois Field
- Reduction of Area per Good Die for SoC Memory Built-In Self-Test