Improved Annealing Process for Electroless Pd Plating Induced Crystallization of Amorphous Silicon
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概要
- 論文の詳細を見る
Electroless Pd plating induced crystallization of amorphous silicon (a-Si) thin films has been proposed for fabricating low-temperature polycrystalline silicon thin film transistors (LTPS TFTs). However, the current crystallization process often leads to poor device performance due to the large amount of Pd-silicide residues in the poly-Si thin films. It was found that the amount of Pd silicide increased with annealing time and temperature. In this study, a two-step annealing process was developed to obtain the appropriate amount of Pd silicide for inducing the crystallization of a-Si. The device characteristics were significantly improved by this two-step process.
- Japan Society of Applied Physicsの論文
- 2003-08-01
著者
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Huang Tian
Department Of Materials Science And Engineering National Chiao Tung University
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Hu Guo-ren
Department Of Materials Science And Engineering National Chiao Tung University
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Wu YewChung
Department of Material Science and Engineering, National Chiao Tung University, 1001 Ta-Hsueh Road,
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Wu Yewchung
Department Of Material Science And Engineering National Chiao Tung University
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