Development and evaluation of capacitance detection ASIC for three-axis common electrode type capacitive accelerometer

概要

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A capacitance detection CMOS ASIC has been developed for three-axis common electrode type capacitive accelerometers. The ASIC contains an analog output switched capacitor circuit and a digital output 2nd order deltasigma modulator. The circuits were driven by three or six phase clocks for three-axis detection. The characteristics of the circuits were evaluated by a variable capacitor and a three-axis capacitive accelerometer. A novel compensation method was proposed to reduce the sensitivity dependence on Z-axis acceleration. The three-axis output voltages of the switched capacitor circuits were proportional to three-axis accelerations. The offset and sensitivity of the 2nd order delta-sigma modulator can be calibrated by outer voltages. The sensitivities of 1.5V/G and 20kHz/G were obtained respectively when the circuits were combined with a commercial available three-axis capacitive accelerometer.
社団法人電気学会の論文
2001-03-01