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Ulsi Development Center Mitsubishi Electric Corporation | 論文
- A Method of Hot Carrier Lifetime Prediction in Partially-Depleted Floating SOI NMOSFETs
- Analysis of GaInAsP Surfaces by Contact-Angle Measurement for Wafer Direct Bonding with Garnet Crystals
- Direct Bonding between Quaternary Compound Semiconductor and Garnet Crystals for Integrated Optical Isolator
- Direct Measurement of Transient Drain Current in PD-SOI MOSFETs Using Nuclear Microprobe for Highly Reliable Device Design
- Analysies of the Radiation Caused Characteristics Change in SOI MOSFETS Using Field Shield Isolation
- Clarification of Floating-Body Effects on Current Drivability in Deep Sub-Quarter Micron Partially-Depleted SOI MOSFET's
- A Study of Metal Impurities Behavior due to Difference in Isolation Structure on ULSI Devices
- Substrate Engineering for Reduction of α-Particle-Induced Charge Collection Efficiency
- Advanced Retrograde Well Technology for 90-nm-node Embedded SRAM by High-Energy Parallel Beam
- Saturation Phenomenon of Stress Induced Gate Leakage Current
- High Performance 0.2μm Dual Gate CMOS by Suppression of Transient-Enhanced-Diffusion Using Rapid Thermal Annealing Technologies
- Clarification of Nitridation Effect on Oxidation Methods
- Reliability of Non-Uniformly Doped Channel (NUDC) MOSFETs for Sub-Quarter-Micron Region
- Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter Micron LDD MOSFETs
- Optimum Voltage Scaling and Structure Design for the Low Voltage Operation of FN Type Flash EEPROM with High Reliability and Constant Programming Time
- 80nm High Performance CMOSFET with Low Gate Leakage Current Using Conventional Thin Gate Nitric Oxide
- Transformation of Dense Contact Holes during SiO2 Etching
- Modified Gate Re-Oxidation Technology for High-Performance Embedded Dynamic RAM by Self-Adjusted Gate Bird’s Beak
- Effects of Charge Build-up of Underlying Layer by High Aspect Ratio Etching
- Effect of Electron Shading on Gate Oxide Degradation