High Performance 0.2μm Dual Gate CMOS by Suppression of Transient-Enhanced-Diffusion Using Rapid Thermal Annealing Technologies
スポンサーリンク
概要
- 論文の詳細を見る
- 1997-09-16
著者
-
INOUE Y.
ULSI Laboratory, Mitsubishi Electric Corporation
-
NISHIMURA T.
ULSI Laboratory, Mitsubishi Electric Corporation
-
Sayama H.
Ulsi Laboratory Mitsubishi Electric Corporation
-
Sayama H.
Ulsi Development Center Mitsubishi Electric Corporation
-
KUROI T.
ULSI Laboratory, Mitsubishi Electric Corporation
-
Kuroi T.
Process Technology Development Div. Renesas Technology Corp.
-
TERAMOTO A.
ULSI Development Center, Mitsubishi Electric Corporation
-
NISHIDA Y.
ULSI Laboratory, Mitsubishi Electric Corporation
-
SHIMIZU S.
ULSI Laboratory, Mitsubishi Electric Corporation
-
FURUKAWA A.
Advanced Technology R&D Center, Mitsubishi Electric Corporation
-
UCHIDA T.
ULSI Laboratory, Mitsubishi Electric Corporation
-
Kuroi T.
Ulsi Laboratory Mitsubishi Electric Corporation
-
Kuroi T.
Process Technology Development Div Renesas Technology Corp.
-
Teramoto A.
Ulsi Development Center Mitsubishi Electric Corporation
関連論文
- Analysis of the Charge Density at Field Oxide/SOI and SOI/Buried Oxide Interfaces in Partially Depleted SOI MOSFET's with and without Hydrogenation
- A Method of Hot Carrier Lifetime Prediction in Partially-Depleted Floating SOI NMOSFETs
- Direct Measurement of Transient Drain Current in PD-SOI MOSFETs Using Nuclear Microprobe for Highly Reliable Device Design
- Analysies of the Radiation Caused Characteristics Change in SOI MOSFETS Using Field Shield Isolation
- Clarification of Floating-Body Effects on Current Drivability in Deep Sub-Quarter Micron Partially-Depleted SOI MOSFET's
- A Novel STI Process from the View Point of Total Strain Process Design for 45nm Node Devices and Beyond
- Substrate Engineering for Reduction of α-Particle-Induced Charge Collection Efficiency
- Layout Independent Transistor with Stress-controlled and Highly Manufacturable STI Process
- Advanced Retrograde Well Technology for 90-nm-node Embedded SRAM by High-Energy Parallel Beam
- Saturation Phenomenon of Stress Induced Gate Leakage Current
- High Performance 0.2μm Dual Gate CMOS by Suppression of Transient-Enhanced-Diffusion Using Rapid Thermal Annealing Technologies
- Clarification of Nitridation Effect on Oxidation Methods
- Reliability of Non-Uniformly Doped Channel (NUDC) MOSFETs for Sub-Quarter-Micron Region
- Impact of Nitrogen Implantation on Highly Reliable Sub-Quarter Micron LDD MOSFETs
- High-Speed 0.5μm SOI 1/8 Frequency Divider with Body-Fixed Structure for Wide Range of Applications
- 80nm High Performance CMOSFET with Low Gate Leakage Current Using Conventional Thin Gate Nitric Oxide