Sadachika Norio | Hiroshima-university
スポンサーリンク
概要
関連著者
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Mattausch Hans
Hiroshima Univ. Higashihiroshima‐shi Jpn
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SADACHIKA Norio
Hiroshima University
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MIURA-MATTAUSCH Mitiko
Hiroshima University
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Sadachika Norio
Hiroshima-university
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Mattausch Hans
Hiroshima University
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Mattausch Hans
Research Institute For Nanodevice And Bio Systems Hiroshima University
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Miura‐mattausch M
Hiroshima Univ. Higashi‐hiroshima Jpn
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Miura-mattausch Mitiko
Hiroshima-university
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Feldmann Uwe
Hiroshima Univ. Higashihiroshima‐shi Jpn
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Feldmann Uwe
Hiroshima University
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MIYAKE Masataka
Hiroshima University
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HORI Daisuke
Hiroshima University
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IIZUKA Takahiro
Semiconductor Technology Academic Research Center
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Miura‐mattausch Mitiko
Hiroshima University
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MATSUZAWA Kazuya
Semiconductor Technology Academic Research Center(STARC)
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OKA Hideki
Fujitsu Laboratories Ltd.
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MURAKAMI Takahiro
Hiroshima University
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TANABE Ryou
Fujitsu laboratories Ltd.
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OHGURO Tatsuya
Semiconductor Technology Academic Research Center
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TAGUCHI Masahiko
Semiconductor Technology Academic Research Center
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MIYAMOTO Shunsuke
Semiconductor Technology Academic Research Center
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SAHARA Yasuyuki
Semiconductor Technology Academic Research Center
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HOSHIDA Teruhiko
Semiconductor Technology Academic Research Center
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TSUKADA Toshiro
Semiconductor Technology Academic Research Center
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Ohguro Tatsuya
Department Of Physics Faculty Of Science Hokkaido University
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Matsuzawa Kazuya
Semiconductor Technology Academic Research Center
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Oka Hideki
Fujitsu Laboratories Ltd
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Mizoguchi Takeshi
Semiconductor Technology Academic Research Center
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Ohguro Tatsuya
Semiconductor Company Toshiba Corporation
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Matsumoto S
Semiconductor Technology Academic Research Center
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Yumisaki Akihiro
Hiroshima-university
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MIMURA Shu
Hiroshima-University
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JOHGUCHI Kou
Hiroshima-University
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KAYA Akihiro
Hiroshima-University
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Tsukada Toshiro
Semiconductor & Integrated Circuits Group Hitachi Lid.
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Murakami Takahiro
HiSIM Research Center, Hiroshima University, Higashihiroshima, Hiroshima 739-8530, Japan
著作論文
- Compact Double-Gate Metal-Oxide-Semiconductor Field Effect Transistor Model for Device/Circuit Optimization
- Degraded Frequency-Tuning Range and Oscillation Amplitude of LC-VCOs due to the Nonquasi-Static Effect in MOS Varactors
- Non-Quasi-Static Carrier Dynamics of MOSFETs under Low-Voltage Operation
- Prediction of Circuit-Performance Variations from Technology Variations for Reliable 100nm SOC Circuit Design