CHENG Ching-Ling | R&D Dept., Chino-Excel Technology Crop.

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概要

• 同名の論文著者
• R&D Dept., Chino-Excel Technology Crop.の論文著者

関連著者

• CHENG Ching-Ling

  R&D Dept., Chino-Excel Technology Crop.

• Cheng Ching

  R&d Dept. Chino-excel Technology Corp.

• Chien Feng‐tso

  Dep. Of Electronic Engineering Feng Chia University

• Su Shih

  R&d Dept. Chino-excel Technology Corp.

• Chien Feng-tso

  The R&d Dept. Chino-excel Technology Corp.:the Department Of Electrical Engineering Feng Chia Un

• Fang Chin-mu

  Department Of Electronic Engineering Feng-chia University

• TU Kou-Way

  R&D Dept., Chino-Excel Technology Corp.

• Tu Kou

  R&d Dept. Chino-excel Technology Corp.

• SU Shin-Tzung

  R&D Dept., Chino-Excel Technology Corp.

• SU Shih-Tzung

  R&D Dept., Chino-Excel Technology Crop.

• CHIEN Feng-Tso

  Dept. of Electronic Engineering, Feng Chia University

• LAI Ming-Hung

  R&D Dept., Chino-Excel Technology Crop.

• Chien Feng-Tso

  R&D Dept. Chino-Excel Technology Corp.

• Lai Ming

  R&d Dept. Chino-excel Technology Corp.

• Fang Chin-mu

  Dept. Of Electronic Engineering Feng-chia University

• LIAO Chien-Nan

  Department of Electronic Engineering, Feng Chia University

• Chien Feng-tso

  Department Of Electronic Engineering Feng Chia University

• Liao Chien-nan

  Department Of Electrical Engineering National Central University

• Liao Chien-nan

  Department Of Electronic Engineering Feng Chia University

• Cheng Ching-ling

  R&d Dept Chino-excel Technology Corp.

• Tsai Yei-Long

  R&D DEPT, Chino-Excel Technology Corp.

• Tsai Yei-long

  R&d Dept Chino-excel Technology Corp.

• Yin Jin-Mu

  Dept. of Electronic Engineering, Feng Chia University

• Yin Jin-mu

  Dept. Of Electronic Engineering Feng Chia University

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著作論文

• A Novel High Ruggedness Power MOSFET With a Planar Oxide Deep P+ Implant Structure
• InGaP/InGaAs DCFETs with Drain and Source Recess Process
• High Ruggedness Power MOSFET Design by a Self-Align P+ Process(Session A7 High Power Devices)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Boron Penetration study of P channel Power MOSFET for Low Gate Driving Application(Session B5 Si-Devices I)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• High Ruggedness Power MOSFET Design by a Self-Align P+ Process(Session A7 High Power Devices)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Boron Penetration study of P channel Power MOSFET for Low Gate Driving Application(Session B5 Si-Devices I)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004))
• Boron Penetration study of P channel Power MOSFET for Low Gate Driving Application
• A Novel Power MOSFET Structure with Split P-well and Split Poly Design
• A Novel Power MOSFET Structure with Split P-well and Split Poly Design
• A Novel Power MOSFET Structure with Shallow Junction Dual Well Design(Session 6B Power Devices,AWAD2006)
• A Novel Power MOSFET Structure with Shallow Junction Dual Well Design(Session 6B Power Devices,AWAD2006)

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