Effects of Selecting Channel Direction in Improving Performance of Sub-100 nm MOSFETs Fabricated on (110) Surface Si Substrate

概要

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We investigated the low field mobility and short channel characteristics of metal-oxide-semiconductor field-effect transistors (MOSFETs) on (110) surface Si substrates with various channel directions from the viewpoints of experiment and numerical simulation. We found that the mobility ($\mu$) ratio of (110) substrates to (001) substrates ($\mu_{(110)}/\mu_{(001)}$) does not depend on the vertical electric field due to the identical surface roughness for (110) and (001) substrates. We verified mobility enhancement and its channel direction dependence by conducting a detailed carrier transport simulation using a full band model and relaxation time approximation. We obtained good threshold voltage ($V_{\text{th}}$) lowering characteristics due to the suppression of channeling at the source and drain (SD) extension by implant sequence control. Our results showed that the improvement in propagation delay time ($CV/I$) and on-current ratio of nMOS to pMOS (${I_{\text{on}}}^{\text{n}}/{I_{\text{on}}}^{\text{p}}$) obtained by using an optimized combination of channel directions and a (110) surface Si substrate is attractive for future LSIs down to the sub-100 nm region.
Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
2004-04-15