FPGA-Based Design for Motion Vector Estimation Exploiting High-Speed Imaging and Its Application to Motion Classification with Neural Networks

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概要

• 論文の詳細を見る

• In this study, we propose an architecture for estimating motion vectors by searching for one neighbor pixel in high-speed images and a machine learning algorithm that uses the estimated motion vectors. In high-speed imaging, the motion of pixels between frames is considerably small. Our architecture estimates motion vectors by assuming that the pixels move less than one pixel between frames. We verified that our method could classify images into two classes, i.e., dangerous (something is approaching) or safe (others), by employing a simple perceptron after extracting the features of the estimated motion vectors using a method based on Poggios HMAX (Hierarchical Model and X) model. We used the target images captured by an in-vehicle camera for learning and verified that another set of images could be classified using our method. We confirmed that the proposed architecture can estimate motion vectors using a small number of operations and perform classification based on machine learning.

• 信号処理学会の論文

著者

• Asai Tetsuya

  Graduate School Of Information Science And Technology Hokkaido University

• Ikebe Masayuki

  Graduate School Of Information Science And Technology Hokkaido University

• Kuroda Tadahiro

  Faculty of Science and Technology, Keio University

• Mori Masafumi

  Graduate School of IST, Hokkaido University

• Itou Toshiyuki

  Graduate School of IST, Hokkaido University

• Motomura Masato

  Graduate School of IST, Hokkaido University

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