D-10-5 An Instruction Decomposition Scheme to Aid Fine-Grained Online Recovery in Pipeline Processor
スポンサーリンク
概要
- 論文の詳細を見る
- 社団法人電子情報通信学会の論文
- 2010-03-02
著者
-
YAO Jun
Graduate School of Informatics, Kyoto University
-
SHIMADA Hajime
Graduate School of Informatics, Kyoto University
-
Yao Jun
Graduate School Of Informatics Kyoto Univ.
-
Kobayashi Kazutoshi
Graduate School Of Informatics Kyoto University
-
Kobayashi Kazutoshi
Graduate School Of Science And Technology Kyoto Institute Of Technology
-
Yao Jun
Graduate School Of Information Science Nara Institute Of Science And Technology
-
Shimada Hajime
Graduate School Of Informatics Kyoto University
-
Shimada Hajime
Graduate School Of Information Science Nara Institute Of Science And Technology
-
Kobayashi Kazutoshi
Graduate School of Science and Technology, Kyoto Institute of Technology
関連論文
- A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases
- Spreading Code Assignment for Multicarrier CDMA System over Frequency-Selective Fading Channels(Terrestrial Radio Communications)
- Inter-Code Interference and Optimum Spreading Sequence in Frequency-Selective Rayleigh Fading Channels on Uplink MC-CDMA(Signal Processing for Communications)(Digital Signal Processing)
- An Instruction Mapping Scheme for FU Array Accelerator
- Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers(Selected Papers from the 16th Workshop on Circuits and Systems in Karuizawa)
- A Resource-Shared VLIW Processor for Low-Power On-Chip Multiprocessing in the Nanometer Era(Digital, Low-Power LSI and Low-Power IP)
- A Leakage Reduction Scheme for Sleep Transistors with Decoupling Capacitors in the Deep Submicron Era(Electronic Circuits)
- D-10-5 An Instruction Decomposition Scheme to Aid Fine-Grained Online Recovery in Pipeline Processor
- An Area/Delay Efficient Dual-Modular Flip-Flop with Higher SEU/SET Immunity
- An EDP Study on the Optimal Pipeline Depth for Pipeline Stage Unification Adoption
- Score-Level Fusion of Phase-Based and Feature-Based Fingerprint Matching Algorithms
- A Robust 3D Face Recognition Algorithm Using Passive Stereo Vision
- A Light Bypass Network Design for Cascading ALU Executions
- A Dynamic Control Mechanism for Pipeline Stage Unification by Identifying Program Phases
- Dynamic Control Mechanisms for Pipeline Stage Unification Based on Program Phase Detection
- Dynamic Control Mechanisms for Pipeline Stage Unification Based on Program Phase Detection(集積回路技術とアーキテクチャ技術の協調・融合へ向けた,プロセッサ,並列処理,システムLSIアーキテクチャ及び一般)
- Architecture and Performance Evaluation of a New Functional Memory : Functional Memory for Addition (Special Section on VLSI Design and CAD Algorithms)
- A Real-Time Low-Rate Video Compression Algorithm Using Multi-Stage Hierarchical Vector Quantization (Special Section on VLSI for Digital Signal Processing)
- High-Accuracy Estimation of Image Rotation Using 1D Phase-Only Correlation
- A Passive 3D Face Recognition System and Its Performance Evaluation
- A Palmprint Recognition Algorithm Using Phase-Only Correlation
- A Fingerprint Matching Algorithm Using Phase-Only Correlation(Digital Signal Processing for Pattern Recognition)(Applications and Implementations of Digital Signal Processing)
- An Auction Protocol Preserving Privacy of Losing Bids with a Secure Value Comparison Scheme (Applications) (Cryptography and Information Security)
- B-5-83 Evaluation of Inter-code Interference on Uplink MC-CDMA
- High-Accuracy Subpixel Image Registration Based on Phase-Only Correlation(Digital Signal Processing)
- Variation-Tolerance of a 65-nm Error-Hardened Dual-Modular-Redundancy Flip-Flop Measured by Shift-Register-Based Monitor Structures
- Higher-Order Effect of Source--Drain Series Resistance on Saturation Drain Current in Sub-20 nm Metal--Oxide--Semiconductor Field-Effect Transistors
- RazorProtector: Maintaining Razor DVS Efficiency in Large IR-Drop Zones by an Adaptive Redundant Data-Path
- NBTI-Induced Delay Degradation Analysis of FPGA Routing Structures
- Selective Check of Data-Path for Effective Fault Tolerance
- A Radiation-Hard Redundant Flip-Flop to Suppress Multiple Cell Upset by Utilizing the Parasitic Bipolar Effect
- An Instruction Scheduler for Dynamic ALU Cascading Adoption
- An Instruction Scheduler for Dynamic ALU Cascading Adoption