Very Fast Integrated Optoelectronic Logic for Parallel Computation Using Photodiode Gates (<Special Section>OPTICAL COMPUTING 1)
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概要
- 論文の詳細を見る
A new configuration of an integrated optoelectronic logic unit using GaAs photodiode gates is proposed. Implementation of AND and EOR logic units are performed monolithically using GaAs/AlGaAs multilayer structures. Discussions are made on the realization of the full adder by means of optical feedback between the photodiode logic array and the surface emitting diode laser array.
- 社団法人応用物理学会の論文
- 1990-07-20
著者
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Umemoto Yasunari
Central Research Laboratory, Hitachi, Ltd.
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Kamiya Takeshi
Department Of Applied Physics Faculty Of Engineering University Of Tokyo:(present Address) Departmen
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KAMIYAMA Hiroyuki
Department of Electronic Engineering, Univeristy of Tokyo
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SHOUNO Atsuo
Department of Electronic Engineering, University of Tokyo
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Kamiyama Hiroyuki
Department Of Electronic Engineering University Of Tokyo
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Shouno Atsuo
Department Of Electronic Engineering University Of Tokyo
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Umemoto Yasunari
Central Research Laboratory Hitachi Ltd.
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UMEMOTO Yasunari
Central Research Laboratory, Hitachi Ltd.
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