Silicon Wafer Annealing Effect in Loop Defect Generation

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概要

• 論文の詳細を見る

• Dislocation free silicon wafers were annealed before oxidation, and effects of the annealing on the generation of loop defects, which were caused during thermal oxidation, were studied by etching methods, Cu decoration method and by analyzing the dark current patterns of silicon target vidicons. The grown-in defects were produced when the crystals grew rapidly and acted as the origins of the loop defects, but were extinguished by high temperature annealing within a few hundred microns from surfaces exposed to annealing atmosphere (Ar). Therefore, loop defects were not produced within these few hundred microns. Extinction of the grown-in defects by the annealing was confirmed by the etching and Cu decoration methods. The density of the loop type defects was remarkably reduced by the high temperature annealing of wafers before oxidation.

• 社団法人応用物理学会の論文
• 1974-10-05

著者

• Shiraki Hiromitsu

  Central Research Laboratories Nippon Electric Co. Ltd.

• Shiraki Hiromitsu

  Central Research Laboratories Nippon Electric Company

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• Secondary Defect Generation Suppression in Heavily Boron Implanted Silicon Wafers by HCl Oxidation
• Silicon Wafer Annealing Effect in Loop Defect Generation
• Stacking Fault Generation Suppression and Grown-In Defect Elimination in Dislocation Free Silicon Wafers by HCl Oxidation
• Elimination of Stacking Faults in Silicon Wafers by HCl Added Dry O_2 Oxidation
• Dislocation Etch Pits on Solution Grown Gallium Phosphide

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