POLYCRYSTALLINE SILICON FIELD EMITTER ARRAYS WITH A GATED STRUCTURE
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概要
- 論文の詳細を見る
Gated polycrystalline silicon field emitter arrays have been fabricated by using a combined dry and Wet etching technique for tip formation and a photoresist etch-back process for gate opening. The fabricated emitter with a tip radius of 〜100Å showed electron emissions at a gate voltage of 45 V, comparable to single crystalline silicon tips processed with a sharpening oxidation. The developed method can be applicable to glass-based field emitter displays with semiconductor IC techno1ogies.
- 社団法人電子情報通信学会の論文
- 1997-02-14
著者
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Yu Byoung-Gon
Semiconductor Division, ETRI,
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Yu Byoung-gon
Semiconductor Division Electronics And Telecommunications Research Institute
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Lee J
Micro-electronics Tech. Lab. Electronics And Telecommunications Research Institute
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Kang S
Electronics And Telecommunications Res. Inst. (etri) Daejeon Kor
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Kang Sung
Semiconductor Division Electronics And Telecommunications Research Institute
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Yoo H
Electronics And Telecommunications Res. Inst. Taejon Kor
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Yoo Hyung
Semiconductor Tehnology Division, Electronics and Telecommunications Research Institute
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Yoo Hyung
Semiconductor Tehnology Division Electronics And Telecommunications Research Institute
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Yoo Hyung
Semiconductor Division Etri
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Song Yoon-Ho
Semiconductor Division, Electronics and Telecommunications Research Institute
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Lee Jin
Semiconductor Division, Electronics and Telecommunications Research Institute
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Cho Kyoung
Semiconductor Division, Electronics and Telecommunications Research Institute
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Song Y‐h
Micro-electronics Tech. Lab. Electronics And Telecommunications Research Institute
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Cho Kyoung
Micro-electronics Tech. Lab. Electronics And Telecommunications Research Institute
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