A Low Power Matched Filter for DS-CDMA Based on Analog Signal Processing
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概要
- 論文の詳細を見る
This paper proposes a low power consumption Analog Matched Filter (AMF) that utilizes capacitor multiply-and-accumulate operations. A high-speed, high-precision Analog-to-Digital (A/D) converter is unnecessary because the proposed circuit directly samples received analog signals. A code-shifting MF structure is used to prevent errors from accumulating. A 15-tap AMF circuit was fabricated using 0.35μm CMOS technology. Power consumption for the 128-tap circuit is estimated to be 22.3mW at 25 MHz and 3.3V, and the area is estimated to be 0.33mm^2. The proposed circuit will thus be a useful LSI for mobile terminals.
- 社団法人電子情報通信学会の論文
- 2003-04-01
著者
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SASAKI Masahiro
Department of Internal Medicine, Division of Cardiovascular and Respiratory Medicine, Akita Universi
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Matsumoto Takashi
Department Of Cardiology Kyoto First Red Cross Hospital
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Sakai Takeyasu
Advanced Research Institute For Science And Engineering Waseda University
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Sasaki Masahiro
Department Of Electrical Electronics And Computer Engineering Waseda University
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Sasaki Masahiro
Department Of Anatomy Faculty Of Medicine Kyoto University
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Matsumoto T
Department Of Electrical Electronics And Computer Engineering Waseda University
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Matsumoto Takashi
Department Of Applied Physics Waseda University
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Matsumoto Takashi
Department of Applied Material Science, Faculty of Integrated Arts and Sciences, University of Tokushima
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Matsumoto Takashi
Department of Applied Material Science, Faculty of Integrated Arts and Science, University of Tokushima
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