16-Mb Synchronous DRAM with 125-Mbyte/s Data Rate (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
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概要
- 論文の詳細を見る
In order to keep up with the growing need for memory bandwidth at low cost, a new synchronous DRAM (SDRAM) architecture is proposed. The SDRAM has programmable latency, burst length, and burst type for wide variety of applications. The experimental 16M SDRAM (2M × 8) achieves a -Mbyte/s data rate using 0.5-μm twin well CMOS technology.
- 社団法人電子情報通信学会の論文
- 1994-05-25
著者
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Lee S‐h
Electronics And Telecommunications Res. Inst. (etri) Daejeon Kor
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Choi Yun-ho
Product Development Center Memory Division Samsung Electronics
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Cho S‐i
Dram Design Samsung Electronics Company
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Lee Seung-hoon
Product Development Center Memory Division Samsung Electronics
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Lee Seung-hoon
Department Of Electronics Engineering Sogang University
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Cho Seong-ik
Hynix Semiconductor
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Choi Yunho
Product Development Center, Memory Division, Samsung Electronics
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Kim Myungho
Product Development Center, Memory Division, Samsung Electronics
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Jang Hyunsoon
Product Development Center, Memory Division, Samsung Electronics
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Kim Taejin
Product Development Center, Memory Division, Samsung Electronics
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Lee Ho-cheol
Product Development Center, Memory Division, Samsung Electronics
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Park Churoo
Product Development Center, Memory Division, Samsung Electronics
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Lee Siyeol
Product Development Center, Memory Division, Samsung Electronics
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Kim Cheol-soo
Product Development Center, Memory Division, Samsung Electronics
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Cho Sooin
Product Development Center, Memory Division, Samsung Electronics
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Haq Ejaz
Product Development Center, Memory Division, Samsung Electronics
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Karp Joel
Product Development Center, Memory Division, Samsung Electronics
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Chin Daeje
Product Development Center, Memory Division, Samsung Electronics
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Cho Soo-in
Product Development Center Memory Division Samsung Electronics
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Kim C‐s
Korea Telecom Taejon Kor
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Haq Ejaz
Product Development Center Memory Division Samsung Electronics
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Chin Daeje
Product Development Center Memory Division Samsung Electronics
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Lee Seung-hee
Department Of Physics Korea University
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Choi Y
Samsung Electronics Co. Ltd. Gyeongii‐do Kor
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Lee S
Samsung Electronics Co. Ltd. Gyungki‐do Kor
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Karp Joel
Product Development Center Memory Division Samsung Electronics
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Kim T
Chonnnan Natinal Univ. Gwangju Kor
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Kim M
Chungnam Natinal Univ. Daejeon Kor
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Park Churoo
Product Development Center Memory Division Samsung Electronics
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Lee Ho-cheol
Product Development Center Memory Division Samsung Electronics
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Jang Hyunsoon
Product Development Center Memory Division Samsung Electronics
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