Optimization of Selective Epitaxy Process for Elevated Source/Drain Applicable to 0.15μm Fully Depleted CMOS on 25nm SOI
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概要
- 論文の詳細を見る
- 2000-08-28
著者
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Matsuhashi Hideaki
Vlsi Research Center Oki Electric Industry Co. Ltd.
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Matsuhashi Hideaki
Vlsi R&d Center Oki Electric Industry Co. Ltd.
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KANAMORI Jun
VLSI R&D Center, Oki Electric Industry Co., Ltd.
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NAKAMURA Toshiyuki
VLSI Research Center, Oki Electric Industry, Co., Ltd.
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KATAKURA Yoshiaki
VLSI Research Center, Oki Electric Industry, Co., Ltd.
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Kanamori Jun
Vlsi R&d Center Oki Electric Industry Co. Ltd.
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Kanamori Jun
Vlsi Research Center Oki Electric Industry Co. Ltd.
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Katakura Yoshiaki
Vlsi Research Center Oki Electric Industry Co. Ltd.
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Nakamura Toshiyuki
Vlsi Research Center Oki Electric Industry Co. Ltd.
関連論文
- Ultra-High Selectivity Sidewall-Spacer Etching and Contact Hole Etching Technologies for 0.1μm FD-SOI Devices
- Optimization of Selective Epitaxy Process for Elevated Source/Drain Applicable to 0.15μm Fully Depleted CMOS on 25nm SOI
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