Suppression of Storage Node Contact Distortion for Gigabit-Scale DRAM with COB Structure
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概要
- 論文の詳細を見る
- 2000-08-28
著者
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Kim D.
Advanced Technology Development Semiconductor R&d Div. Samsung Electronics Co. Ltd
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Kim J.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim H.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park Y.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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KIM D.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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KIM J.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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KIM T.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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PARK J.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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JEOUNG H.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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KIM H.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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YEOM K.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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KIM S.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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PARK D.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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Jeoung H.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim J.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim S.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim D.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park J.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park J.
Advanced Technology Team 2 Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim T.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim T.
Semiconductor R&d Center Samsung Electronics Co. Ltd
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Jeong H.
Advanced Technology Development Samsung Electronics Co. Ltd
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Park J.
Advanced Technology Development 2 Team Semiconductor R&d Center Memory Division Samsung Electron
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Kim S.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim J.
Advanced Technology Development 2 Team Semiconductor R&d Center Memory Division Samsung Electron
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Kim H.
Semiconductor R & D Lab. Hyundai Electronics Industries Co. Ltd.
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Yeom K.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kim H.
Advanced Technology Development 2 Team Semiconductor R&d Center Memory Division Samsung Electron
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PARK J.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
関連論文
- Optimization of Ring Type Electrode Process for High Density PRAM
- A Technology for Suppressing Inter-Layer Dielectric Crack in a High Density DRAM
- Suppression of Storage Node Contact Distortion for Gigabit-Scale DRAM with COB Structure
- Inter-Layer Dielectric Reliability on 1GDRAM with COB Structure
- Endurance Characterization of Ferroelectric Cell in 64Mb FRAM Device By Analyzing the Space Charge Concentration
- Highly Reliable Ring Type Contact Scheme for High Density PRAM
- Robust 2-D Stack Capacitor Technologies for 64Mb 1T1C FRAM
- GST Confined Structure and Integration of 64Mb PRAM
- Robust 3-Metallization BEOL Process for 0.18μm Embedded FRAM
- A Novel T-Shaped Shallow Trench Isolation Technology Using Sidewall Spacer for 512Mbit Flash Memories and Beyond
- Cost-Effective and Highly Reliable 6F2 Multi-Gigabit DRAM in 60nm Technology Node for Low Power and High Performance Applications
- A Manufacturable HDP Oxide Filled STI Process with SiN Liner for the Deep Sub-Micron Inter-Well Isolation
- Highly Manufacturable 64M bit Ultra Low Power SRAM Using a Novel 3-Dimensional S^3 (Stacked Single-crystal Si) Cell Technology
- Optimization of Process Conditions for Quarter Micron Recessed Poly-Si Spacer LOCOS (RPSL) Isolation
- Stress Effect on the Reliability of pMOS TFTs for 16Mb SRAM : DC Stress at Room and Elevated Temperatures
- Dependence of Defects in Optical Lithography