A Manufacturable HDP Oxide Filled STI Process with SiN Liner for the Deep Sub-Micron Inter-Well Isolation
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概要
- 論文の詳細を見る
- 1998-09-07
著者
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KIM S.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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Lee H.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Park K.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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HWANG B.
Semiconductor R&D Center, Samsung Electronics, Co Ltd.
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CHOI J.
Semiconductor R&D Center, Samsung Electronics, Co Ltd.
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KANG H.
Semiconductor R&D Center, Samsung Electronics Co., LTD
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PARK T.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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SHIN Y.
Semiconductor R&D Center, Samsung Electronics Co., Ltd.
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LI Z.
Applied Materials, Inc.
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LEE Y.
Applied Materials, Inc.
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MOGHADAM F.
Applied Materials, Inc.
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Moghadam F.
Applied Materials Inc.
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Kim S.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kang H.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
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Kang H.
Semiconductor Research Center Samsung Electronics Co. Ltd.
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Choi J.
Semiconductor R&d Center Samsung Electronics Co Ltd.
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Choi J.
Semiconductor R&d Center Samsung Electronics Co. Ltd.
関連論文
- Suppression of Storage Node Contact Distortion for Gigabit-Scale DRAM with COB Structure
- Elimination of Al Line and Via Resistance Degradation under HTS Test in the Application of F-Doped Oxide as Intermetal Dielectrics
- A Novel T-Shaped Shallow Trench Isolation Technology Using Sidewall Spacer for 512Mbit Flash Memories and Beyond
- The Device Degradation Due to Contamination from STI Filling Material
- Novel Method of Threshold Voltage Control of Metal Gate CMOSFETs Using Channel Epitaxy
- A Manufacturable HDP Oxide Filled STI Process with SiN Liner for the Deep Sub-Micron Inter-Well Isolation
- Optimization of Process Conditions for Quarter Micron Recessed Poly-Si Spacer LOCOS (RPSL) Isolation