Impact of Negative-Bias Temperature Instability on the Lifetime of Single-Gate CMOS Structures with Ultrathin (4–6 nm) Gate Oxides
スポンサーリンク
概要
- 論文の詳細を見る
The lifetime of ultrathin gate oxides under low-field stress conditions has been studied on the basis of empirical acceleration equations for negative-bias temperature instability (NBTI) up to 5000 hours for 4.2-to-30-nm-thick oxides of metal-oxide-silicon (MOS) structures. The derived lifetime, the maximum acceptable oxide field, and the maximum acceptable operating voltage are found to be strongly dependent on the reliability specification. Since the number of interface traps induced by NBTI is inversely proportional to the oxide thickness, this instability becomes an important factor limiting the lifetime of single-gate CMOS structures with ultrathin gate oxides.
- INSTITUTE OF PURE AND APPLIED PHYSICSの論文
- 1996-02-28
著者
-
Shiono N
Ntt Lsi Laboratories Nippon Telegraph And Telephone Corporation
-
OGAWA Shigeo
NTT LSI Laboratories
-
Ogawa Shigeo
Ntt Lsi Laboratories Nippon Telegraph And Telephone Corporation
-
Shimaya M
Ntt Telecommunications Energy Laboratories
-
Shimaya Masakazu
Ntt Lsi Laboratories
-
Shiono Noboru
NTT LSI Laboratories, Nippon Telegraph and Telephone Corporation, 3-1 Morinosato Wakamiya,
関連論文
- Evaluation of Hot-Hole Induced Interface Traps at the Tunneling SiO_2(3.5nm)-Si Interface by the Conductance Technique
- The Influence of Stud Bumping above the MOSFETs on Device Reliability(Special Section on Reliability Theory and Its Applications)
- Stress-Induced Device Degradation Due to Die-Attachment Process after Area Bump Formation
- Stress-Induced Device Degradation Due to Die-Attach Process after Area Bump Formation
- Impact of Negative-Bias Temperature Instability on the Lifetime of Single-Gate CMOS Structures with Ultrathin (4–6 nm) Gate Oxides
- Impact of Negative-Bias Temperature Instability on the Lifetime of Single-Gate CMOS Structures with Ultrathin(4-6nm)Gate Oxides
- Electron Trapping Inducedby High-Energy Ionizing Radiation in SiO_2
- An Analysis of and a Method of Enhancing the Intensity of OBIRCH Signal for Defects Observation in VLSI Metal Interconnections (Special Issue on LSI Failure Analysis)