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High-Technology Research Center | 論文
- Simulation Models for Silicon-on Insulator Tunneling-Barrie-Junction Metal-Oxide-Semiconductor Field-Effect Transistor and Performance Perspective
- Simulation Models for Silicon-on-Insulator Tunneling-Barrier-Junction Metal-Oxide-Semiconductor Field-Effect Transistor and Performance Perspective
- Theory of carrier-density-fluctuation-induced transport noise in metal-oxide-semiconductor field-effect transistors
- Single-Mode Silicon Optical Switch with T-Shaped SiO_2 Optical Waveguide as a Control Gate
- Study on Silicon Optical Switch with T-Shape SiO_2 Waveguide as an Optical Control Gate
- An Improved Theory for Direct-Tunneling Current Characterization in a Metal-Oxide-Semiconductor System with Nanometer-Thick Silicon Dioxide Film
- Effect of Silicon Addtion on Electrical Properties of SrBi2Ta2O9 Thin Films
- A Partial-Ground-Plane (PGP) Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) for Deep Sub-0.1μm Channel Regime
- Proposal of a Partial-Ground-Plane(PGP) Silicon-on-Insulator(SOI) MOSFET for Deep Sub-100-nm Channel Regime
- Analysis of Interface Microstructure Evolution in Separation by IMplanted OXygen(SIMOX)Wafers
- Impact of transport noise enhancement in scaled-down MOSFET
- Noise characteristics and modeling of silicon-on-insulator insulated-gate pn-junction devices
- Effect of Silicon Addtion on the Electrical Properties of SrBi2Ta2O9 Thin Films
- Consideration of Performance Limitation of Sub-100-nm Double-Gate Silicon-on-Insulator (SOI) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) : Electnical Properties of Condensed Malter
- Reconsideration of Off-Leakage Current Estimation of Sub -100-nm SOI MOSFETs and Device Selection for Applications
- Quantitative Evaluation of Quantum Mechanical Influence on Flat-Band Capacitance of Poly-Si/SiO_2/Si Substrate System and the Impact of Oxide Charge Density
- Analysis of Thin Oxide Growth Mechanisms in Partial-Pressure Rapid-Thermal Oxidation of Silicon
- Compact Equivalent-Circuit Model for Snap-Back Phenomena in Ultra-Thin SOI MOSFET's and Practical Guideline for ESD-Protection Device Design
- Two-Dimensional Quantization Effect on Indirect Tunneling in an Insulated-Gate Lateral pn-Junction Structure with a Thin Silicon Layer
- Significant initial stress under cyclic application of constant-current stress to thin SiO_2 films