Sugahara Satoshi | Imaging Science And Engineering Laboratory Tokyo Institute Of Technology
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概要
関連著者
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Sugahara Satoshi
Imaging Science And Engineering Laboratory Tokyo Institute Of Technology
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Shuto Yusuke
Imaging Science And Engineering Laboratory Tokyo Institute Of Technology
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Tanaka Masaaki
Department Of Computer Engineering University Of Hyogo:(presently With)mitsubishi Electric Co.
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Nakane Ryosho
School Of Engineering The Univ. Of Tokyo
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Takagi Shin-ichi
Graduate School Of Frontier Science The University Of Tokyo
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Sugahara Satoshi
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
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Hai Pham
Department Of Electronic Engineering The University Of Tokyo
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TANAKA Masaaki
Department of Physiology, Osaka City University Graduate School of Medicine
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Wang Wenhong
Magnetic Materials Center National Institute For Materials Science (nims)
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SUKEGAWA Hiroaki
Magnetic Materials Center, National Institute for Materials Science (NIMS)
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INOMATA Koichiro
Magnetic Materials Center, National Institute for Materials Science (NIMS)
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Inomata Koichiro
Magnetic Materials Center National Institute For Materials Science (nims)
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SHUTO Yusuke
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology
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NAKANE Ryosho
Department of Electrical Engineering and Information Systems, The University of Tokyo
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Nakane Ryosho
Department Of Electrical Engineering And Information Systems The University Of Tokyo
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Sukegawa Hiroaki
Magnetic Materials Center National Institute For Materials Science (nims)
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Hoshii Takuya
Graduate School Of Frontier Science The Univ. Of Tokyo
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Uehara Takashi
Graduate School Of Frontier Science The Univ. Of Tokyo
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Shichijo Masato
Graduate School Of Frontier Science The Univ. Of Tokyo
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Takagi Shinichi
Graduate School Of Frontier Science The Univ. Of Tokyo
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Matsubara Hiroshi
Graduate School Of Frontier Science The Univ. Of Tokyo
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Nakane Ryosho
School of Engineering, The University of Tokyo, Tokyo 113-0032, Japan
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Nakane Ryosho
School of Engineering, The University of Tokyo, Bunkyo-ku, Tokyo 113-0033, Japan
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Sugahara Satoshi
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, 4259-G2-14 Nagatsuta, Midori-ku, Yokohama 226-8502, Japan
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Satoshi Sugahara
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
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Sugahara Satoshi
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, Yokohama 226-8502, Japan
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Shuto Yusuke
Department of Electronic Engineering, The University of Tokyo, Tokyo 113-8656, Japan
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Takagi Shinichi
Graduate School of Frontier Science, The University of Tokyo, Tokyo 133-0032, Japan
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Uehara Takashi
Graduate School of Frontier Science, The University of Tokyo, Bunkyo-ku, Tokyo 113-0033, Japan
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Hoshii Takuya
Graduate School of Frontier Science, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
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Takagi Shin-ichi
Graduate School of Frontier Science, The University of Tokyo, Bunkyo-ku, Tokyo 113-0033, Japan
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Takagi Shin-ichi
Graduate School of Frontier Science, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
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Hai Pham
Department of Electronic Engineering, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan
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Tanaka Masaaki
Department of Electronic Engineering, The University of Tokyo, Tokyo 113-8656, Japan
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Yusuke Shuto
Imaging Science and Engineering Laboratory, Tokyo Institute of Technology, Yokohama 226-8503, Japan
著作論文
- A New Spin-Functional Metal-Oxide-Semiconductor Field-Effect Transistor Based on Magnetic Tunnel Junction Technology : Pseudo-Spin-MOSFET
- Epitaxial growth and magnetic properties of ferromagnetic semiconductor Ge1-xFe[x] thin films epitaxially grown on Si(001) substrates
- Nonvolatile Delay Flip-Flop Based on Spin-Transistor Architecture and Its Power-Gating Applications
- Nonvolatile Static Random Access Memory Using Resistive Switching Devices: Variable-Transconductance Metal–Oxide–Semiconductor Field-Effect-Transistor Approach
- Reconfigurable Logic Gates Using Single-Electron Spin Transistors
- Fabrication of III–V on Insulator Structures on Si Using Microchannel Epitaxy with a Two-Step Growth Technique
- Nonvolatile Static Random Access Memory Using Magnetic Tunnel Junctions with Current-Induced Magnetization Switching Architecture
- Nonvolatile Power-Gating Field-Programmable Gate Array Using Nonvolatile Static Random Access Memory and Nonvolatile Flip-Flops Based on Pseudo-Spin-Transistor Architecture with Spin-Transfer-Torque Magnetic Tunnel Junctions (Special Issue : Applied Physi
- Ultrathin Ge-on-Insulator Metal Source/Drain p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors Fabricated By Low-Temperature Molecular-Beam Epitaxy
- Epitaxial Growth and Magnetic Properties of Ferromagnetic Semiconductor Ge1-xFex Thin Films Epitaxially Grown on Si(001) Substrates
- Effect of Tensile Strain on Gate Current of Strained-Si n-Channel Metal–Oxide–Semiconductor Field-Effect Transistors