Saito Shinobu | System Devices Research Laboratories Nec

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著作論文

High Performance SiN-MIM Decoupling Capacitors with Surface-smoothed Bottom Electrodes for High-speed MPUs
A Metallurgical Prescription Suppressing Stress-induced Voiding (SIV) in Cu lines
Surface Control of Bottom Electrode in Ultra-Thin SiN Metal–Insulator–Metal Decoupling Capacitors for High Speed Processors
Mechanical Property Control of Low-$k$ Dielectrics for Diminishing Chemical Mechanical Polishing (CMP)-Related Defects in Cu-Damascene Interconnects
Effects of the Metallurgical Properties of Upper Cu Film on Stress-Induced Voiding (SIV) in Cu Dual-Damascene Interconnects

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